DipIETE – ET/CS (NEW SCHEME) – Code:
DE60/DC68
NOTE: There are 9 Questions in all.
· Question 1 is compulsory and
carries 20 marks. Answer to Q.1 must be written in the space provided for it in
the answer book supplied and nowhere else.
· Out of the remaining EIGHT
Questions, answer any FIVE Questions. Each question carries 16 marks.
· Any required data not
explicitly given, may be suitably assumed and stated.
Q.1 Choose
the correct or the best alternative in the following: (210)
a. Convert to binary
representation. Choose one answer among
the following which is nearest to the value.
(A) 11001.00101 (B) 11001.00010
(C) 11101.00010 (D) 11101.00110
b. The XCHG instruction in 8085 microprocessor
after execution exchanges the data between
(A) BC & HL register pair (B) AB & CD register pair
(C) DE & HL register pair (D) AB & HL register pair
c. The instruction
JPO means jump on
(A) overflow (B) odd parity
(C) positive (D) zero
d. DAA instruction
is executed to correct result after
(A) DMA (B) BCD subtraction
(C) Burst data transfer (D) BCD addition
e. TRAP is a
(A) Data
transfer instruction (B) Jump
instruction
(C) Non-maskable
interrupt (D) Maskable
interrupt
f. The control
word of 8255 PPI, Port A as input, Port B as output, Port C as don’t care and it
is operating in Mode 0 is given by:-
_____
(A) 96 (B) 97
(C) 98 (D) 90
g.
During DMA operation
(A) Accumulator
is involved in data transfer
(B) Accumulator
is not involved in data transfer
(C) HL register pair is involved in data transfer
(D) BC register pair is
involved in data transfer
h. Synchronous
characters are used in
(A) 8251 (B) 8259
(C) 8255 (D) 8253
i. The programmable interval timer 8253 has
(A) Two modes of operation (B) Five modes of operation
(C) Six
modes of operation (D) Ten modes of operation
j. A microcontroller
has
(A) No memory and two ports inside (B) Many ports and memory inside
(C) No ports and no memory inside (D) One port and no memory inside
Answer any FIVE Questions out
of EIGHT Questions.
Each question carries 16
marks.
Q.2 a. Explain the
function of registers of 8085 and explain their individual significance. (8)
b. Explain the
consequences of executing the following instructions:
(i) DAA (ii) NOP
(iii) ANI data (iv) PUSH PSW (8)
Q.3 a. Explain the architecture of 8085 with a neat diagram. (8)
b. Two memories and Two
I/O ports are to be interfaced with 8085.
(i) EPROM – 2KB
(ii) RAM ------2KB
(iii)
One keyboard (I/P) and one 7 segment display (O/P) device. Give a chip select scheme with address map
for the same. (8)
Q.4 a. Write an assembly language program to exchange two arrays of
length 100 bytes each. Write appropriate comments. (8)
b. Write an ALP
to multiply two eight bit numbers with repeated addition. (8)
Q.5 a. List the hardware and software interrupts available in
8085. How are they triggered? (8)
b. Give the
structure of RIM and SIM instructions and explain their other uses also. (8)
Q.6 a. The
PPI 8255 is operated in Bidirectional data transfer mode with hand shake
signals. Explain the steps involved in
the process. (8)
b. Give the block
diagram of 8279 Keyboard/ display controller interface and explain each block. (8)
Q.7 a. What is the need for a PIC? Explain the internal architecture of a PIC. (8)
b. What is
DMA? How do you use a programmable DMAC
chip to achieve this? (8)
Q.8 a. Program
the 8253 to generate a mode 0 type interrupt.
Explain this operation with waveforms. (8)
b. Give the pin
descriptions of 8251 with a neat diagram.
(8)
Q.9 a. Give the architecture of a microcontroller
and explain how it is different from a microprocessor. (8)
b. Write a
program to transfer a block of 10 bytes from one part of the memory to another
part of memory using a microcontroller. (8)