AMIETE – CS (OLD SCHEME)
NOTE: There are 9 Questions in all.
· Question 1 is compulsory and carries
20 marks. Answer to Q.1 must be written in the space provided for it in the
answer book supplied and nowhere else.
· Out of the remaining EIGHT
Questions, answer any FIVE Questions. Each question carries 16 marks.
· Any required data not
explicitly given, may be suitably assumed and stated.
Q.1 A Choose the correct or the best alternative
in the following: (210)
a.
Intel’s
80186 and 80286 microprocessors are
(A) 16-bit (B)
8-bit
(C) 32-bit (D) None of the above
b.
The
8086 microprocessor can directly address of memory up to
(A) 64 Kbytes (B)
128 Kbytes
(C) 256 Kbytes (D)
None of the above
c.
For
MOVS instruction, if DF = 1, the contents of index register SI and DI are
(A) Automatically decrements (B)
Automatically increments
(C) Both get subtracted (D)
Both get added
d.
Suppose
that , if BX=0301, after execution of MOV AL, [BX + 1346H] the
(A) The contents of 1647 (B) The contents of 0301 + 1346
(C) The contents of 1346 + 0301 (D) The contents of 1346
e. The term
SUPERSCALAR is used for the processor
(A) Which contains GHz Clock?
(B) Which contains more CACHE’S?
(C) Which contains more than one pipeline?
(D) None of the above
f.
The
control word for 8255 to make Port-A as the output port and rest of the ports
as the input ports is
(A) 8BH (B)
8CH
(C) C2H (D)
None of the above
g. Maximum how many I/O devices can be connected employing two
8259 IC’s
(A) 16 (B)
56
(C) 8 (D)
None of the above
h. The 8253 contains three
independent presettable 16 – bit down counters are
(A) Negative edge triggered (B) Positive edge triggered
(C) Level sensitive (D) None of the above
i.
The
CACHE controllers are
(A) Intel 8207, 8203, 82C08 (B) Intel 8256H, 8206, 82489DX
(C) Intel 8201, 8202, 82C03 (D) None of the above
j. The EEPROM programming voltage
level is
(A) 30 V or higher (B) 12 V or higher
(C) 50 V (D) None of the above
Answer any FIVE Questions out
of EIGHT Questions.
Each
question carries 16 marks.
Q.2 a. Mention various registers used in 8086.
Explain the function of each register. (6) (6)
b. Compare 80286
and 80386 microprocessors.
(5)
c. Explain virtual and protected mode of
8086. (5)
Q.3 a. Explain
the functions of the following: (6)
(i) Debugger
(ii) Assembler
(iii) Linker
b. Write an assembly language program to find
sum of ‘n’ integers. (4)
c. What do you understand by assembler directives? What do the following assembler directives do? (6)
(i) ASSUME
(ii) SEGMENT
(iii) MACRO
Q.4 a. Explain DMA. Give its
operation. (5)
b. Discuss the role of a bus arbiter in a multiprocessor
configuration. (5)
c. Mention any THREE functions from each of the following:- (6)
(i)
BIOS
(ii)
DOS
Q.5 a. Explain
any SIX of the following
instructions in 8086 family with example and their effect on flag. (6)
(i) CWD (ii) IDIV
(iii) AAS (iv) SAR
(v) LOOP (vi) SAHF
(vii) IMUL
b. What is I/O processor? What is its function?
How does it improve the efficiency of a computer? (4)
c. Explain
address decoding in 8086. How 16-bit and 32-bit memory interface is done to
8086. (6)
Q.6 a. What is EISA
bus? Write down its salient features. (5)
b. What is a PCI bus? Discuss its features and
usage. (5)
c. Discuss mode –2 (bi-directional mode) of 8255 (Programmable
Peripheral Interface). (6)
Q.7 a. Draw
the waveform for minimum mode 8086 bus timing for the following:- (8)
(i) Read operation
(ii) Write operation
b. Discuss the various types of memory devices and give their
functionality. (8)
Q.8 a. Explain the operation of 8279. Explain the following terms:
(i) N key Roll over.
(ii) Key
board debounce.
(iii) FIFO RAM.
(4+6)
b. Explain the difference between the memory mapped
I/O and isolated I/O. (6)
Q.9 Write explanatory notes on any FOUR: (16)
(i) Comparison of RS232C and RS422A standards (ii) 8259 programmable interrupt controller (iii) A/D conversion (iv) Interrupt processing and hardware interrupts. (v) DRAM and its interfacing. |