TYPICAL QUESTIONS &
ANSWERS
PART
- I
OBJECTIVE TYPE QUESTIONS
Each
Question carries 2 marks.
Choose
correct or the best alternative in the following:
Q.1 The breakdown mechanism in a lightly doped p-n junction under reverse biased condition is called
(A) avalanche breakdown.
(B)
zener breakdown.
(C)
breakdown by
tunnelling.
(D) high voltage breakdown.
Ans: A
Q.2 In a CE – connected transistor amplifier with voltage – gain A_{v}, the capacitance C_{bc} is amplified by a factor
(A)
_{} (B) _{}
(C)_{} (D)
_{}
Ans: B
Q.3 For a large values of |V_{DS}|, a FET – behaves as
(A)
Voltage controlled resistor.
(B)
Current controlled current source.
(C)
Voltage controlled
current source.
(D)
Current controlled
resistor.
Ans: C
Q.4 Removing bypass capacitor across the emitter-leg resistor in a CE amplifier causes
(A) increase in current gain. (B)
decrease in current gain.
(C) increase in voltage gain. (D)decrease in voltage
gain.
Ans: D
Q.5 For an op-amp having differential gain A_{v} and common-mode gain A_{c} the CMRR is given by
(A)
_{} (B)
_{}
(C) _{} (D) _{}
Ans: B
Q.6 When a step-input is given to an op-amp integrator, the output will be
(A)
a ramp.
(B)
a sinusoidal wave.
(C)
a rectangular wave.
(D)
a triangular wave with dc bias.
Ans: A
Q.7 Hysteresis is desirable in Schmitt-trigger, because
(A)
energy is to be stored/discharged in parasitic capacitances.
(B)
effects of temperature would be compensated.
(C)
devices in the circuit should be allowed time for saturation
and desaturation.
(D)
it would prevent noise from causing false triggering.
Ans: C
Q.8 In a full-wave rectifier without filter, the ripple factor is
(A)
0.482 (B) 1.21
(C) 1.79 (D)
2.05
Ans: A
Q.9 A minterm of the Boolean-function, f(x, y, x) is
(A) _{} (B)_{}
(C)
x z (D)
(y +z) x
Ans: B
Q.10 The minimum number of flip-flops required to construct a mod-75 counter is
(A) 5 (B) 6
(C) 7 (D)
8
Ans: C
Q.11 Space charge region around a p-n junction
(A) does
not contain mobile carriers
(B) contains
both free electrons and holes
(C) contains one type of mobile carriers depending on the level
of doping of the p or n regions
(D) contains electrons only as free carriers
Ans: A
Q.12 The important characteristic of emitter-follower is
(A) high input impedance and high output impedance
(B) high input impedance and low output impedance
(C) low input impedance and low output impedance
(D) low input impedance and high output impedance
Ans: B
Q.13 In a JFET, at pinch-off voltage applied on the gate
(A) the drain current becomes almost zero
(B)
the drain current begins to
decrease
(C)
the drain current is almost at saturation value.
(D) the drain-to-source voltage is close to zero
volts.
Ans: C
Q.14 When an amplifier is provided with current series feedback, its
(A) input impedance increases and output impedance decreases
(B) input and output impedances both decrease
(C) input impedance decreases and output
impedance increases
(D) input and output impedances both increase
Ans: D
Q.15 The frequency of oscillation of a tunnel-collector oscillator having
L= 30μH and C = 300pf is nearby
(A) 267 kHz (B)
1677 kHz
(C) 1.68 kHz (D) 2.67
MHz
Ans: B _{}
Q.16 The open-loop gain of an op-amp available in the market may be around.
(A)
10^{–1} (B)
10
(C) 10^{5} (D)
10^{2}
Ans: C
Q.17 The control terminal (pin5) of 555 timer IC is normally connected to ground through a capacitor (~ 0.01μF). This is to
(A) protect the IC from inadvertent
application of high voltage
(B) prevent false
triggering by noise coupled onto the pin
(C) convert the trigger
input to sharp pulse by differentiation
(D) suppress any negative
triggering pulse
Ans: B
Q.18 The value of ripple factor of a half-wave rectifier without filter is approximately
(A) 1.2 (B)
0.2
(C) 2.2 (D)
2.0
Ans: A
Q.19 The three variable Boolean expression xy + xyz + _{}y + x_{}z
(A) _{} (B) _{}
(C) _{} (D)
_{}
Ans: C
_{}
Q.20 The fan-out of a MOS-logic gate is higher than that of TTL gates because of its
(A)
low input impedance (B)
high output impedance
(C) low output impedance (D) high input impedance
Ans: D
Q.21 In an intrinsic semiconductor, the Fermi-level is
(A) closer to the valence
band
(B) midway between conduction and valence band
(C) closer to the
conduction band
(D) within the valence band
Ans: C
Q.22 The reverse – saturation current of a silicon diode
(A) doubles for every 10°C
increase in temperature
(B) does not change with temperature
(C) halves for every 1°C
decrease in temperature
(D) increases by 1.5 times for every 2°C increment in temperature
Ans: A
Q.23 The common collector amplifier is also known as
(A) collector follower (B) Base follower
(C) Emitter follower (D) Source follower
Ans: C
Q.24 In class–A amplifier, the output current flows for
(A) a part of the cycle
or the input signal.
(B) the full cycle of the input signal.
(C) half the cycle of the input signal.
(D) 3/4^{th} of the cycle of the input
signal.
Ans: B
Q.25 In an amplifier with negative feedback
(A) only the gain of the amplifier is affected
(B) only the gain and
bandwidth of the amplifier are affected
(C) only the input and
output impedances are affected
(D) All of the four
parameters mentioned above would be affected
Ans: D
Q.26 Wien bridge oscillator can typically generate frequencies in the range of
(A) 1KHz – 1MHz
(B) 1 MHz – 10MHz
(C) 10MHz – 100MHz
(D) 100MHz – 150MHz
Ans: A
Q.27 A differential amplifier, amplifies
(A) and mathematically
differentiates the average of the voltages on the two input lines
(B)
and differentiates the input waveform on one line when the
other line is grounded
(C)
the difference of voltages between the two input lines
(D)
and differentiates the sum of the two input waveforms
Ans: C
Q.28 The transformer utilization factor of a half-wave rectifier is approximately
(A) 0.6 (B)
0.3
(C) 0.9 (D)
1.1
Ans: B
0.286 _{}0.3
Q.29 The dual of the Boolean expression: x + y + z is
(A) _{} (B) _{}
(C) _{} (D)
_{}
Ans: C
_{}
Q.30 It is required to construct a counter to count upto 100(decimal). The minimum number of flip-flops required to construct the counter is
(A) 8 (B) 7
(C) 6 (D) 5
Ans: A
Q.31 The power conversion efficiency of an output
stage is defined as_______.
(A) (Load power + supply power) /
supply power
(B) (Load power + supply power) / (load
power-supply power)
(C) Load power / supply power
(D) Supply power / load power
Ans. (C)
Power
gain is defined as the ratio of output signal power to that of input signal
power.
Q.32 A highly stable
resonance characteristic is the property of a ____ oscillator.
(A) Hartley (B) Colpitts
(C) Crystal (D) Weinbridge
Ans. (C)
Q.33 The gate that assumes the 1 state, if and
only if the input does not take a 1
state is called________.
(A) AND gate (B) NOT gate
(C)
NOR gate (D) Both (B) & (C)
Ans. (D)
Y=
therefore output is high only when the values
of both A and B are 0.
Q.34 The width of depleted region of
a PN junction is of the order of a few tenths of a ___________.
(A) millimeter (B) micrometer
(C)
meter (D) nanometer
Ans. (B)
Q.35 For
NOR circuit SR flip flop the not allowed condition is ________.
(A) S=0, R=0. (B) S=0, R=1.
(C)
S=1, R=1. (D) S=1, R=0.
Ans. (C)
When
S=R=1 the output is subject to unpredictable behaviour when S and R return to 0 simultaneously.
Q.36 In negative feedback the return ratio is
__________.
(A) 0 (B) 1
(C)
greater than 0 (D) greater than 1
Ans. (C)
In
a negative feed back circuit, always the return ratio will be in the range of 0
to 1.
Q.37 A
phase shift oscillator uses __________________.
(A) LC tuning (B) Piezoelectric crystal
(C)
Balanced bridge (D) Variable frequency operation
Ans. (C)
Q.38 The voltage gain of basic CMOS is
approximately _________.
(A) (g_{m}r_{o})/2 (B) 2g_{m}r_{o}
(C)
1 / (2g_{m}r_{o}) (D) 2r_{o} / g_{m}
Ans. (A)
Q.39 Transistor is a
(A) Current controlled current device.
(B) Current controlled voltage device.
(C)
Voltage controlled current device.
(D)
Voltage controlled voltage device.
Ans. (A)
The output current depends on the input
current.
Q.40 A bistable multivibrator is a
(A)
Free running oscillator. (B) Triggered oscillator.
(C)
Saw tooth wave generator. (D) Crystal oscillator.
Ans. (B)
The
transistors would change their state of operation from ON to OFF and vice versa
depending on the external trigger provided.
Q.41 If the output voltage of a bridge rectifier
is 100V, the PIV of diode will be
(A)
100√2V (B) 200/π V
(C)
100πV (D) 100π/2 V
Ans. (D)
Peak
inverse voltage = max secondary voltage
V_{dc}=2V_{m}/ π =100
V_{m}=100 π /2
Q.42 In
the voltage regulator shown below, if the current through the load decreases,
(A)
The current through R1 will increase.
(B)
The current through R1 will decrease.
(C)
zener diode current will increase.
(D)
zener diode current will decrease.
Ans. (C)
Q.43 In Boolean algebra A + AB
(A)
A + B
(B) A + B
(C) A + B
(D) A +B
Ans. (A)
A.1+A
B= A (1+B) +A B = A + AB +A B = A+B (A +A) = A+B
Q.44 For a JFET, when V_{DS} is increased
beyond the pinch off voltage, the drain current
(A) Increases
(B) decreases
(C) remains constant.
(D) First decreases and then increases.
Ans. (C)
At
pinch off voltage drain current reaches its maximum off. Now if we further increase V_{DS} above Vp the
depletion layer expands at the top of the channel. The channel acts as a
current limiter & holds drain current constant
Q.45 The type of power amplifier which
exhibits crossover distortion in its output is
(A)
Class A (B) Class B
(C) Class AB (D) Class C
Ans. (B)
The
transistors do not conduct until the input signal is more than cut-in voltage
of the B-A junction. In class B, the devices being biased at cut-off, one
device stops conducting before the other device starts conducting leaving to Cross-over
distortion.
Q.46 The main advantage of a crystal
oscillator is that its output is
(A) 50Hz to 60Hz (B)
variable frequency
(C)
a constant frequency. (D) d.c
Ans. (C)
The
quality factor (Q) of a crystal as a resonating element is very high, of the order of thousands. Hence frequency of a
crystal oscillator is highly stable.
Q.47 The lowest output impedance is obtained in
case of BJT amplifiers for
(A) CB
configuration.
(B) CE configuration.
(C)
CC configuration.
(D) CE with R_{E}
configuration.
Ans. (C)
The
output impedance in case of CC configuration is on the order of a few ohms.
(In
case of CB ≈ 450kΩ and in case of CE ≈ 45kΩ)
Q.48 N-channel FETs are superior to P-channel
FETs, because
(A) They have higher input impedance
(B) They have high switching time
(C) They consume less power
(D) Mobility of electrons is greater
than that of holes
Ans. (D)
Q.49 The upper cutoff frequency of an RC coupled
amplifier mainly depends upon
(A) Coupling capacitor
(B)
Emitter bypass capacitor
(C)
Output capacitance of signal source
(D)
Inter-electrode capacitance and stray shunt capacitance
Ans. (D)
Q.50 Just as a voltage amplifier amplifies
signal-voltage, a power amplifier
(A) Amplifies power
(B) Amplifies signal current
(C) Merely converts the signal ac power
into the dc power
(D) Merely converts the dc power into useful
ac power
Ans. (D)
Q.51 A radio frequency signal contains three
frequency components, 870 KHz, 875 KHz and 880 KHz. The signal needs to be
amplified. The amplifier used should be
(A) audio frequency amplifier (B) wide band amplifier
(C)
tuned voltage amplifier (D) push-pull amplifier
Ans. (C)
We
need to amplify 3 signal frequencies i.e., 870 kHz, 875 kHz and 880 kHz.
These
frequencies lie in a bandwidth of 10 kHz and we should use only tuned voltage
amplifiers to amplify them.
Q.52 An oscillator of the LC type that has a
split capacitor in the circuit is
(A) Hartley oscillator
(B) Colpitts oscillator
(C) Weinbridge oscillator
(D) R-C phase shift oscillator
Ans. (B)
We
have two capacitors in the tank circuit, which serve as a simple ac voltage
divider.
Q.53 The function of a bleeder
resistor in a power supply is
(A) the same as that of load resistor
(B) to ensure a minimum current drain
in the circuit
(C) to increase the output dc voltage
(D) to increase the output current
Ans. (B)
Q.54 In a bistable multivibrator circuit,
commutating capacitor is used
(A) to increase the base storage charge
(B) to provide ac coupling
(C) to increase the speed of response
(D) to provide the speed of
oscillations
Ans. (C)
The
commutating capacitor is used for the speedy transition of the state of the
bistable.
Q.55 n-type
silicon is obtained by
(A)
Doping with tetravalent element
(B) Doping with pentavalent element
(C) Doping with trivalent element
(D) Doping with a mixture of trivalent
and tetravalent element
Ans: (B)
The
pentavalent atom provides an excess electron while the other four form the covalent bond with the neighbouring
atoms. This excess free electron provides the n type conductivity.
Q.56 The forward characteristic of a diode has a
slope of approximately 50mA/V at a
desired
point. The approximate
incremental resistance of the diode is
(A) 50Ω (B) 35Ω
(C)
20Ω (D) 10Ω
Ans: (C)
Resistance
at any point in the forward characteristics is given by R= ΔV/ ΔI
= 1/50mA = 20Ω
Q.57 Two stages of BJT amplifiers are cascaded by
RC coupling. The voltage gain of the
first
stage is 10 and that of the
second stage is 20. The overall gain of
the coupled amplifier is
(A) 10x20
(B) 10+20
(C)
(10+20)^{2}
(D) (10x20)/2
Ans: (A)
The voltage gain of a multistage
amplifier is equal to the product of the gains of the individual stages.
Q.58 In the voltage range, Vp < V_{DS}
< BV_{DSS} of an ideal JFET or MOSFET
(A)
The drain current varies linearly with V_{DS}.
(B) The drain current is constant.
(C) The drain current varies
nonlinearly with V_{DS}.
(D) The drain current is cut off.
Ans: (B)
It is the saturation region or
pinch off region, and drain current remains almost constant at its maximum value, provided V_{GS}
is kept constant.
Q.59 In a voltage shunt negative feedback
amplifier system, the input resistance Ri and the output
resistance Ro of the basic
amplifier are modified as follows:
(A)
Ri is decreased and Ro increased.
(B) Both Ri and Ro are decreased.
(C) Both Ri and Ro are increased
(D) Ri is increased and Ro is
decreased.
Ans: (B)
Here,
a fraction of output voltage obtained by parallel sampling is applied in
parallel with the input voltage through feedback and both input and output
resistance decrease by a factor equal to (1+ βAv).
Q.60 The
use of crystal in a tunable oscillator
(A) Improves frequency stability.
(B) Increases the gain of the
oscillator.
(C) Helps to obtain optimum output
impedance.
(D) Facilitates generation of wide
range of frequencies.
Ans:
(A)
Piezoelectric
crystal is used as a resonant tank circuit. The crystal is made of quartz
material and provides a high degree of frequency stability.
Q.61 The large signal bandwidth of an opamp is
limited by its
(A)
(C) output impedance (D) input frequency
Ans: (B)
Q.62 Rectification efficiency of a full wave
rectifier without filter is nearly equal to
(A) 51% (B) 61%
(C)
71% (D) 81%
Ans: (D)
Efficiency
of a full wave rectifier is given by
[(2I_{m}
/ π) 2 x R_{L}] / [(I_{m}
/ √2) 2 x (R_{f} + R_{L})] = 81%, when Rg is zero.
Q.63 When the temperature of a doped semiconductor is increased, its conductivity
(A) decreases.
(B) increases.
(C) does not change.
(D) increases or decreases depending on whether it is p- or n-type.
Ans:
B
Q.64 The main characteristics of a Darlington Amplifier are
(A) High input impedance, high output impedance and high current gain.
(B) Low input impedance, low output impedance and low voltage gain.
(C) High input impedance, low output impedance and high current gain.
(D) Low input impedance, low output impedance and high current gain.
Ans: C
Q.65 The transconductance, g_{m}, of a JFET is computed at constant V_{DS}, by the following:
(A) _{} (B) _{}
(C) _{} (D) _{}
Ans: A
Q.66 The feedback factor β at the frequency of oscillation of a Wien bridge oscillator is
(A) 3 (B) _{}
(C) _{} (D) _{}
Ans: B
Q.67 In an amplifier with negative feedback, the bandwidth is
(A)
increased by a factor of β
(B) decreased by a factor of β
(C) increased by a factor of (1+Aβ)
(D) not affected at all by the feedback
where A = gain of the
basic amplifier and β = feedback factor
Ans:
C
Q.68 The ‘slew rate’ of an
operational amplifier indicates
(A)
how fast its output current can change
(B) how fast its output impedance can change
(C) how fast its output power can change
(D) how fast its output voltage can change
when a step input
signal is given.
Ans:
D
Q.69 In a clamping
circuit, the peak-to peak voltage of the waveform being clamped is
(A)
affected by the clamping
(B)
not affected by the clamping
(C)
determined by the clamping
voltage value
(D) determined by the ratio of rms voltage of the waveform and the clamping voltage
Ans: B
Q.70 Regulation of a.d.c. power supply is given by
(A) product of no-load output voltage and full-load current
(B) ratio of full-load output voltage and full-load current
(C) change in output voltage from no-load to full-load
(D) change in output impedance from no-load to full-load
Ans: D
Q.71 A ‘literal’ in Boolean Algebra means
(A) a variable inn its uncomplemented form only
(B) a variable ORed with its complement
(C) a variable in its complemented form only
(D) a variable in its complemented or uncomplemented form
Ans: D
Q.72 In an unclocked R-S flip-flop made of NOR gates, the forbidden input condition is
(A) R = 0, S = 0 (B) R = 1, S = 0
(C) R = 0, S = 1 (D) R = 1, S = 1
Ans: D
Q.73 The current amplification factor in CE configuration is
(A) α (B) β + 1
(C) _{} (D) β
Ans: D
Q.74 A zener diode
(A) Has a high forward voltage rating.
(B) Has a sharp breakdown at low reverse voltage.
(C) Is useful as an amplifier.
(D) Has a negative resistance.
Ans: B
Q.75 N-channel FETs are superior to P-channel FETs, because
(A) They have a higher input impedance.
(B) They have high switching time.
(C) They consume less power.
(D) Mobility of electrons is greater than that of holes.
Ans:
Q.76 The maximum possible collector circuit efficiency of an ideal class A power amplifier is
(A) 15% (B) 25%
(C) 50% (D) 75%
Ans: C
Q.77 Negative feedback in an amplifier
(A) Reduces the voltage gain.
(B) Increases the voltage gain.
(C) Does not affect the voltage gain.
(D) Converts the amplifier into an oscillator.
Ans: A
Q.78 For generating 1 kHz signal, the most suitable circuit is
(A) Colpitts oscillator. (B) Hartley oscillator.
(C) Tuned collector oscillator. (D) Wien bridge oscillator.
Ans: D
Q.79 Phe output stage of an op-amp is usually a
(A)
(A) Complementary emitter follower.
(B)
(B) Transformer coupled class B amplifier.
(C) (C ) Class A power amplifier.
(D) (D) Class B amplifier.
Ans:
A
Q.80 When a sinusoidal voltage wave is fed to a Schmitt trigger, the output will be
(A) triangular wave. (B) asymmetric square wave.
(C) rectangular wave. (D) trapezoidal wave.
Ans:
B
Q.81 If the peak value of the input voltage to a half wave rectifier is 28.28 volts and no filter is use, the maximum dc voltage across the load will be
(A) _{}. (B) 15 V.
(C) 9 V. (D) 14.14 V.
Ans:
C
Q.82 The logic gate which detects equality of two bits is
(A) EX-OR (B) EX-NOR
(C) NOR (D) NAND
Ans:
B
Q.83 The electron relaxation time of metal A is _{}s, that of B is _{}s. The ratio of resistivity of B to resistivity of A will be
(A) 4. (B) 2.0.
(C) 0.5. (D) 0.25.
Ans:
B
Q.84 The overall bandwidth of two identical voltage amplifiers connected in cascade will
(A) Remain the same as that of a single stage.
(B) Be worse than that of a single stage.
(C) Be better than that of a single stage.
(D) Be better if stage gain is low and worse if stage gain is high.
Ans: B
Q.85 Field effect transistor has
(A) large input impedance. (B) large output impedance.
(C) large power gain. (D) large votage gain.
Ans: A
Q.86 Which of the following parameters is used for distinguishing between a small signal and a large-signal amplifier?
(A) Voltage gain (B) Frequency response
(C) Harmonic Distortion (D) Input/output impedances
Ans:
D
Q.87 Which of the following parameters is used for distinguishing between a small signal and a large-signal amplifier?
(A) Instability (B) Bandwidth
(C) Overall gain (D) Distortion
Ans:
B
Q.88 If the feedback signal is returned to the input in series with the applied voltage, the input impedance ______.
(A) decreases (B) increases
(C) does not change (D) becomes infinity
Ans:
B
Q.89 Most of linear ICs are based on the two transistor differential amplifier because of its
(A) input voltage dependent linear transfer characteristic.
(B) High voltage gain.
(C) High input resistance.
(D) High CMRR
Ans: D
Q.90 The waveform of the output voltage for the circuit shown in Fig.1 (RC >> 1) is a
(A) sinusoidal wave (B) square wave
(C) series of spikes (D) triangular wave.
Ans: D
Q.91 A single phase diode bridge rectifier supplies a highly inductive load. The load current can be assumed to be ripple free. The ac supply side current waveform will be
(A) sinusoidal (B) constant dc.
(C) square (D) triangular
Ans:
C
Q.92 Which of the following Boolean rules is correct?
(A) A + 0 = 0 (B) A + 1 = 1
(C) _{} (D) _{}
Ans:
B
Q.93 A single phase diode bridge rectifier supplies a highly inductive load. The load current can be assumed to be ripple free. The ac supply side current waveform will be
(A) sinusoidal (B) constant dc.
(C) square (D) triangular
Ans:
C
Q.94 Which of the following Boolean rules is correct?
(A) A + 0 = 0 (B) A + 1 = 1
(C) _{} (D) _{}
Ans:
B
PART
– II
NUMERICALS
Q.1 In a transformer, give the relationship between
(i) turns ratio and its primary and secondary impedances
(ii) turns ratio and primary/secondary voltage.
In a transformer-coupled amplifier,
the transformer used has a turns ratio N1:N2 = 10:1. If the source impedance is 8 KΩ what should be
the value of load impedance for maximum power transfer to the load? Also find
the load voltage if the source voltage is 10 volts. (6)
Ans: p. 439 – 40
Given: _{}; _{} - load side; _{} - amplifier side or source side.
_{}
Turns ratio and impedances: _{}
Turns ration and voltages: _{}
_{}; i.e. _{}_{}
Load voltage = V_{2} ; _{} _{}.
Q.2 The FET circuit given below in Fig.1, has R_{1}=3.5MΩ,
R_{2} = 1.5MΩ, R_{S} = 2KΩ, R_{L} = 20KΩ
and g_{m} = 2.5mS. Find its input impedance, output impedance and
voltage gain. (8)
Ans:
(i) _{}
(ii) _{}
(iii) Voltage gain _{}
Q.3 In an amplifier with negative feedback, the gain of the basic amplifier is 100 and it employs a feedback factor of 0.02. If the input signal is 40mV, determine
(i) voltage gain with feedback and
(ii) value of output voltage. (3)
Ans:
(i) _{}
(ii) _{}
Q.4 In the circuit
shown below in Fig.2, R_{1}=12KΩ, R_{2} = 5KΩ, R_{3}
= 8KΩ, R_{F} = 12KΩ. The inputs are: V_{1} = 9V, V_{2}
= -3V and V_{3} = -1V. Compute the output voltage. (4)
Ans:
_{}
= - 12(0.75 – 0.6 – 0.125) = - 0.3 V.
Q.5 A half-wave rectifier has a load resistance of 3.5 KΩ. If the diode and secondary of the transformer have a total resistance of 800KΩ and the ac input voltage has 240 V (peak value), determine:
(i) peak, rms and average values of current through load
(ii) DC power output
(iii) AC power input
(iv) rectification efficiency (7)
Ans:
(i) I_{m} = V_{m } = 240 = 55.8mA = peak current.
R_{L} + R_{f} 3.5X 103 + 800
_{}= average current.
_{}.
(ii) DC power output = _{} watts.
(iii) AC power input = _{} watts.
(iv) Rectification Effect =_{}.
Q.6 A BJT has a base current of 250 μA and emitter current of 15mA
Determine the collector current gain and β. (2)
Ans:
The current relationship in a transistor is given by _{}
i.e. _{}
Given: _{}
I_{E} = 15 mA
_{}
And _{}.
Q.7 In the circuit shown in Fig.1, [I_{DSS}] = 4mA, V_{p }=
4V. Find the quiescent values of 1_{D}, V_{GS} and V_{DS}
of the FET. (6)
Fig.1
Ans:
The potential divider bias circuit can be replaced by Thevenin equivalent as shown, where
_{}
_{}
Applying Kirchoff’s Voltage law to gate–source circuit gives _{} as there is no gate current flow.
Hence _{}
Given, I_{DSS} = 4 mA and V_{P} = 4 V. substituting these values in the equation for I_{P}
_{}
Forming the quadratic equation in V_{GS}.
_{}
Solving, V_{GS} = 3 V(Solution V_{GS}
= 4V is not realistic).
Solving
for
Hence, V_{DS} = 30 – 0.25(18 + 4) = 24.5 Volts.
Q.8 In the transformer coupled class A amplifier shown in Fig.2 below,
the transistor has h_{FE} = β = 40 and h_{ie} = 25Ω.
Assume that the transformer is ideal and that _{} and also _{}. Determine values of R_{1} and R_{2} to
obtain quiescent current I_{CQ} = 100mA. If the collector current swing
_{}, find the peak values of load current and load voltage.
Transformer turns ratio is primary 1:6 secondary. (10)
Ans:
The equivalent circuit replacing R_{1}, R_{2} as part of thevenin source is shown
_{} ……(1) _{} ………(2)
Applying KVL around base-emitter circuit,
_{}
i.e. _{} …….(3)
Any value of R_{B} by which _{}is acceptable. Hence, choosing a reasonable value of 2.2K for R_{B}, _{} volts.
Use equations (1) and (2) to find R_{1} and R_{2}
From (1) _{}
i.e. _{} ……..(4)
substituting the value of R_{1} in equation (2)
_{} ….(5)
simplifying, _{} ………(6)
From (4) and (6), we get
_{} ………(7)
using equation (6), _{}
using equation (7), _{}
The load R_{ac} at the collector leg of the transistor is reflected load of R_{L} as per the turns ratio (a) of the transformer.
i.e. _{}
As i_{c} swings ± 80 mA either side of I_{CQ} = 100 mA on the R_{ac} load line, and V_{CEQ} = 12V (DC load line being almost vertical)
_{}
= 12 + 5.55 = 17.55 Volts.
Hence, Maximum Load voltage_{(secondary)}:
Hence, Maximum Load current:
_{}.
Q.9 A negative feedback of β = 2.5 x 10^{-3} is applied to
an amplifier of open loop gain 1000. Calculate the change in overall gain of
the feedback amplifier if the gain of the internal amplifier is reduce by 20%. (4)
Ans:
If A is the gain of the basic amplifier, the overall gain A_{f} of the amplifier with negative f.b. is
_{} given A = 1000 and β = 2.5 x 10^{-3},
_{}
When A is
reduced by 20%, the new A, say A_{n} = 1000 – 0.2 x 10^{3} =
800
The new voltage gain with f.b. is
_{}.
Q.10 A full wave rectifier is fed with a voltage, 50 sin 100 πt. Its load resistance is 400Ω. The diodes used in the rectifier have an average forward resistance of 30Ω. Compute the
(i) average and rms values of load current,
(ii) ripple factor and
(iii) efficiency of rectification. (6)
Ans:
The maximum value of load current
_{}; given: V_{max} = 50volts; R_{L} = 400Ω, R_{F} = 30 Ω
Thus _{}
Average current I_{avg }=_{ }2 I_{max }for a FWR
π
i.e. I_{avg} = 2 X 0.1163 = 0.074A or 74 mA = I_{dc}
λ
The r.m.s value of load current is
_{}
Ripple factor _{}
Efficiency of rectification in a FWR is given by
_{} i.e. _{} or 75.5%.
Q.11 For the circuit shown in Fig.2, find thee maximum and minimum values
of zener diode current. (8)
Fig.2
Ans: 9mA, 1.0mA.
Q.12 The parameters of the transistor in the circuit shown in Fig.3 are _{} Find
(i) midband gain
(ii) the value of C_{b} necessary to give a lower 3 dB frequency of 20Hz
(iii) the value of C_{b }necessary to ensure less than 10% tilt for a 100 Hz square wave input.
(8)
Fig.3
Ans:
(i) 32.26 (ii) 2.567 Mf (iii) 16.13 Mf
Q.13 For the circuit shown in Fig.4, determine voltage gain, input
impedance, output impedance, common-mode gain and CMRR if _{}, _{}, _{} and transistors Q_{1}
and Q_{2} are identical with _{}. Determine output voltage when _{} and when _{}. (8)
Fig.4
Ans:
A = 150, Z_{in} = 0.66MΩ, Z_{out} = 1MΩ
A_{cm} = 0.5, CMRR = 300
V_{out} = 7.5V and 0.15V
Q.14 A class B push-pull amplifier is supplied with _{}. The minimum voltage reached by the collector due to signal
swing is _{}. The dissipation in both the transistors totals 30 W. What
is the conversion efficiency of the amplifier?
(7)
Ans:
DC supply voltage, Vcc = 40v
Vmin = 8v, Pd = 30w.
As
Pd = Pin(dc) – Pout(ac)
_{}
_{}
_{}
_{}
_{}
_{}
_{}
_{}
_{}
Conversion Efficiency, _{}
_{}
Q.15 The input to an op-amp differentiator circuit is a sinusoidal
voltage of peak value _{} and frequency of 2
kHz. If the values of differentiating components are given as R = 40 k_{} and C =_{}, determine the output voltage. (4)
Ans:
_{}
_{}
Scale factor = CR = _{}
_{}
_{}
_{}
_{}
Q.16 Draw the circuit of a monostable multivibrator using two
transistors. Use the following data in your circuit:_{}, _{}, B_{}, _{} for both the
transistors. The resistor and capacitor connected to the base of _{} have values _{} and C = 0.1 _{} respectively.
Determine the monostable pulse width. (8)
Ans:
_{}, Input pulse width,
_{}
_{}
T = 1.4 714 m
sec.
Monostable Multivibrator Circuit
Q.17 For the series regulator given below, _{}, _{}, the transistor _{}, _{}=1.2 K_{}, _{}=10V and _{}. Calculate (i) output voltage (ii) load current (iii) the
base current in the transistor (iv) zener current. (8)
Ans:
_{}
_{}
_{}
_{}
_{}
Q.18 Find the values of collector and emitter currents in a transistor
having I_{CBO}=3μA, and
α_{dc}=0.98 when its base current is 60μA. (6)
Ans:
_{}= _{}
We know that
_{}
_{}
_{}
_{}
_{}
_{}
_{}
Emitter current, _{}
= _{}
_{}.
Q.19 The h-parameters of the transistor in the amplifier circuit shown
below are: h_{ie}=2.2 KΩ , h_{fe}=52, h_{oe}=_{}and h_{re} is negligible. The output load resistor
dissipates a signal power of 9 mW. Determine the power gain of the amplifier
using its equivalent circuit. The reactances of the capacitors may be
neglected. (8)
12KΩ
+
Vcc
Ans:
_{}
_{}
_{}
Input impedance to E, _{}
_{}
Power drawn from the source, _{}.
Base current, _{}
= _{}
_{}
Output impedance,
_{}
_{}
_{}
_{}
AC-load resistance,
_{}
_{}
_{}
Output voltage,
_{}
_{}
_{}
_{}
_{}
_{}
E = 0.2715
Power gain, Ap = _{}
_{}
_{}
_{}
_{}.
Q.20 The collector voltage of a Class B push pull amplifier with V_{CC}=40
Volts swings down to a minimum of 4 volts. The total power dissipation in both
the transistors is 36 watts. Compute the total dc power input and conversion
efficiency of the amplifier. (7)
Ans:
_{}
_{}
_{}
= _{}
36 = _{}
36 = _{}
_{}
_{}
_{}
_{}
= _{}
_{}
Q.21 The transistor in the feedback circuit shown below has β=200. Determine
(i) feedback factor, (ii) feedback ratio, (iii) voltage gain without
feedback and (iv) voltage gain with feedback in the circuit. In the transistor,
under the conditions of operation, V_{BE} may be assumed to be
negligible. (6)
Ans:
_{}, _{}, _{}, _{}
_{}
_{}
AC Emitter resistance, _{}
_{}
Voltage gain without feedback,
_{}
A = 1008.16
Feedback ratio _{}
_{}
Feedback factor = _{}
Feedback factor = 48.0076
Voltage gain with feedback,
_{}
_{}
Q.22 In the differential amplifier circuit shown below, the transistors
have identical characteristics and their β=100.Determine the (i) output
voltage (ii) the base currents and (iii)
the base voltages taking into account the effect of the R_{B} and V_{BE}.
Take V_{BE}=0.7 Volts. (8)
Ans:
Tail current, _{}
The collector current in transistor Q2 is half thus tail current (i.e. 0.75mA) because each transistor gets half the tail current.
_{}
_{}
Tail current _{}
_{}
_{}
_{}
And Tail current, _{}
_{}
_{}
And output voltage,
_{}
= _{}
_{}
If the results obtained are compared, we find that the results obtained improve with each refinement, but the improvement is not significant.
_{} The ideal tail current is 1.41mA
_{}
_{}
_{}
Q.23 Design
a series voltage regulator to supply 1A to a load at a constant voltage of 9V.
The supply voltage to regulator is 15V±10%. The minimum zener current is 12mA.
For the transistor to be used, assume V_{BE}=0.6V and β=50. (7)
Ans:
_{}
_{}
_{}
_{}
Voltage drop in resistor _{}
Current through resistor R, _{}
_{}
_{}.
Q.24 Obtain the minterms of the function
ƒ(A,B,C) = _{}
and draw the
K-map of the function. (4)
Ans:
_{}
_{}
= _{}
= _{}
Q.25 A
load line intersects the forward V-I characteristic of a silicon diode at Q,
where the slope of the curve is 40mA/V. Calculate the diode resistance at the
point Q. (4)
Ans:
DC or static resistance, _{}
_{}
_{}.
V_{CC}=20V
Q.26 The
power amplifier shown below is operated in class A, with a base current drive
of 8.5mA peak. Calculate the input dc power, the power dissipated in the
transistor, the signal power delivered to the load and the overall efficiency
of the amplifier, if transistor β=30 and V_{BE}=0.7V. (8)
Ans:
_{}
_{}
Now dc – load line is drawn joining points (20v, 0) and (0, 1.25A)
For operating point Q,
_{}
_{}
_{}
_{}
_{}.
_{}
= 0.5202 w.
Power delivered to the transistor,
_{}
= 20(0.579) – (0.579)^{2}.16
= 6.216w
Power lost in transistor = _{}
= 6.216 – 0.5202
= 5.6958
Collector Efficiency, _{}
= _{}
= 8.368 %.
Power rating of transistor = Zero-signal power dissipation
= _{}
= _{}
= 6.216w.
Q.27 Find the period of the output pulse in the circuit shown below: (4)
Ans:
TIMERS
The pulse width = _{}.
Q.28 Analyze
half-wave and full-wave rectifier circuits (without filter) to deduce the
values of rectification efficiency assuming ideal diodes. (8)
Ans:
Rectification
efficiency of half-wave rectifier, which is defined as the ratio of dc-output
power to the ac-input power, is given as
_{}
= _{}.
Now, _{}. _{}
P_{ac} = Power dissipated in diode junction + Power dissipated in load resistance R_{L}
= _{}
= _{}
_{}
_{} i.e. 40.6 % if R_{F} is neglected.
Full-wave rectifier:
_{}
_{}
Rectification efficiency, _{}
_{}
_{} if R_{F} is neglected.
Q.29 An intrinsic silicon bar is 4mm long and has a rectangular cross section 60x100
(mm)^{ 2}. At 300K, find the electric field intensity in the bar and voltage across the bar
when a steady state current of 1mA is measured. (Resistivity of intrinsic silicon at
300K is 2.3 x 10^{3} W-m (7)
Ans:
Length=4mm
A=60 x 100 (mm)^{ 2}
_{ }Current I =1mA
Resistivity r = 2.3 x 10^{3} Wm
J = σ E
E = J / σ = (I/A) (1/σ) = (I/A) r
E = (1 x 10^{-6}/ (60 x 10^{-6} x 100 x 10^{-6}))x 2.3 x10^{3}
= 383.33 x 10^{3 }V/m
V = EL = 383.33 x 10^{3 } x 4mm =1.53 x 10^{3} V
Q.30 The resistivity of doped silicon material is 9 x 10^{-3}ohm-m. The Hall co-efficient is
3.6 x 10^{-4}m^{3 }columb^{-1}. Assuming single carrier conduction, find the mobility and
density of
charge carrier (e = 1.6 x 10^{-19} coulomb)
(7)
Ans:
R_{H} = 3.6x10^{-4} m^{3}/columb, ρ = 9x10^{-3} ohm-m
Mobility = μ_{n }= σ R_{H} = (1/ρ)R_{H} = (1/9x10^{-3})x 3.6x10^{-4 }= 400 cm^{2}/V-s
Density of charge carriers = σμ
= (1/9x10^{-3}) 400 = 44.44m coulomb
Q.31 A single tuned amplifier
with capacitive coupling consists tuned circuit having R=10, L=20mH and C=0.05
F. Determine the (i) Resonant
frequency (ii) Q-factor of the tank
circuit (iii) Bandwidth of the amplifier. (7)
Ans:
(i) Reasonant frequency: f_{r} = 1 / (2_{}√LC) = 1 / (2_{}√ 20x10^{-3}x0.05x10^{-6}) = 5032 Hz
(ii) Q-factor of the tank circuit: Q = X_{L }/ R = 2_{}f_{r}L / R.
X_{L}=2_{}f_{r}L / = (2 _{} x 5032 x 20x10^{-3})/10=63.23
Q = 63.23 / 10 =6.32
(iii) Band width of the amplifier: As Q = f_{r }/ BW
_{}6.32 = 5032 / BW
BW = 769.20Hz
Q.32 Calculate the output voltage ‘V_{0}’ for the following non inverting op-amp summer,
with V_{1} =2V and V_{2} = -1V (7)
Ans:
V_{O} = ([R_{2}V_{1} + R_{1}V_{2}] / [R_{1} + R_{2}] )* ([R + R_{f}] / R)
If in the summer circuit the value of resistance are selected as R_{1 }= R_{2} = R and
R_{f} = 2R . Then
V_{O} = - [(2R) V_{1}/R + (2R) V_{2}/R]
= - [2(V_{1} + V_{2})]
= - [2(2 -1) ] = -2 V
Q.33 The current flowing through a certain P-N junction at room
temperature when reverse biased is 0.15μA. Given that volt-equivalent of
temperature, V_{T} is 26mV, and the bias voltage being very large in comparison to V_{T}, determine the current flowing
through the diode when the applied voltage is 0.12V. (7)
Ans:
The diode current is given by
I = Io (e^{-(Vp/ηVT)}- 1)
For large reverse bias, the diode current
I = Io = 0.15 x 10^{-6}A.
Given V=0.12V, V_{T} = 0.026 V, assuming Si diode, i.e.,η = 2
I = 0.15 x 10^{-6} (e^{ (0.12/ (2 x 0.026)) }- 1)
= 1.36 μA
Q.34 In a transistor amplifier, change of 0.025V in signal voltage causes the base current to change by 15μA and collector current by 1.2 mA. If collector and load resistances are of 6kΩ and 12kΩ, determine
i) input resistance (ii) current gain
iii) ac load (iv) voltage gain
v)
power gain (7)
Ans:
i) Input resistance = change in input voltage / change in input current = 0.025/15 x 10^{-6 }= 1.67kΩ
ii) Current gain = β = change in output current / change in input current = 1.2mA/15 x 10^{-6 }= 80
iii) AC load = Rc || RL = 6k x 12k/(6k+12k) = 4kΩ
iv) Voltage gain: output voltage = 1.2 x 10^{-3 }x 4 x 10^{3 }= 4.8V = Vo
input voltage = 0.025V = Vi
Voltage Gain = Vo / Vi = 4.8 / 0.025 =192
v) Power gain = voltage gain x current gain = 192 x 80 = 15360
Q.35 What is a load line and how is it used in the calculation of
current and voltage gains for a single stage amplifier? (7)
Ans:
In a transistor, the collector current I_{C} depends on base current I_{B}. The variation of I_{C} for a specific load R_{C} as a function of input voltage is along a straight line. This line for a fixed load is called as dc load line. The output characteristic of a CE amplifier is plotted in the Fig. 13a. Consider the following specifications of the CE amplifier.
Fig. 13a
I_{BQ} = 40μA
I_{CQ}=8mA, V_{CEQ} = 6V
V_{S} = V_{m} sinωt
The amplitude V_{m} is chosen to provide a signal component of base current
I_{b} = I_{bm} sinωt
Where I_{bm} = 20μA
Total instantaneous base current i_{B} is the superposition of the dc level and the signal current.
Therefore i_{B} = I_{BQ} + I_{b} = 40 + 20 sinωt μA
From the figure, we see that variation in I_{B} causes both I_{C} and V_{CE} to vary sinusoidally about their quiescent levels. These quantities are expressed as
i_{C} = I_{CQ}+ i_{C} = I_{CQ} + I_{cm} sinωt
v_{CE} = V_{CEQ} + v_{ce} = V_{CEQ} + V_{cm} sinωt V
From figure 3a, I_{cm} = 4mA and V_{cm}= 2V
Q.36 The transconductance of a FET used in an amplifier circuit is 4000 micro-siemens. The load resistance is 15kΩ and drain circuit resistance is 10 MΩ. Calculate the voltage gain of the amplifier circuit .
Ans:
Given: g_{m} = 4000, R_{L} = 15kΩ, r_{d} = 10MΩ (7)
V_{o} = -g_{m}
x V_{gs} (r_{d} || R_{L})
V_{o} / V_{in} = -(g_{m} x V_{gs} (r_{d} || R_{L})) / V_{in}
But V_{gs} = V_{in}
Therefore voltage gain V_{o} / Vin = -(g_{m} (r_{d} || R_{L}))
V_{o} / V_{in} = 4000x10^{-6 }x ( ( 10^{6}x15x10^{3}) / (10^{6} + 15x10^{3 }) )
= (60x10^{6}) / (10^{3}(10^{3 }+ 1)
≈ 60
Q.37 An output waveform displayed on an oscilloscope provided the following measured values
i) V_{CE} min=1.2V, V_{CE}
max=22V, V_{CEQ}=10V
ii) V_{CE} min=2V, V_{CE} max=18V,
V_{CEQ}=10V
Determine the
percent second harmonic distortion in each case. (14)
Ans:
D2 = (|B2| / |B1|) x 100%
i) B2 = (I_{max }+ I _{min} – 2IcQ) / 4
= (V_{CE} _{max }+ V_{CE} _{min} – 2V_{CEQ}) / 4
= (22+1.2-20) / 4 = 3.2 / 4 = 0.8
B1 = (I _{max}- I_{min}) / 2 = (V_{CE} _{max }– V_{CE}
_{min}) / 2 = (22-1.2) / 2 = 10.4
D2 =
(0.8 / 10.4)x100 = 7.69%
ii) B2 = (2+18-20) / 4 = 0
B1 = (18-2) / 2 = 8
D2 = 2.5/8 x 100 = 0%
Q.38 A sample of pure
silicon has electrical resistivity of 3000Ωm. The free carrier density in
it is 1.1x10^{16}/m^{3}. If the electron mobility is three
times that of hole mobility, find electron mobility and hole mobility. The
electronic charge is equal to 1.6x10^{-19}coulomb. (6)
Ans:
For pure Silicon, n_{i} = n = p = 1.1x10^{16}/ m^{3}, and mn= 3mp^{}
s = n_{i} (m_{n} + m_{p}) e = 1.1x10^{16} (m_{p} + 3m_{p}) 1.6x10^{–19}= 7.04 x 10^{-3} m_{p}^{}
= (3000 Wm)^{-1}
Thus m_{p}x7.04x10^{-3} = 1/3x10^{-3}
i.e., m_{p} = .047 m^{2} V^{-1} S^{-1 }and m_{n }= 3 m_{p} =0.141 m^{2} V^{-1} S^{-1}
Q.39 Explain ‘Zener
breakdown’. The zener diode in the circuit shown below regulates at 50V,
over a range of diode currents from 5 to 40mA. The supply voltage V = 150V.
Compute the value of R to allow voltage regulation from a zero load current to
a maximum load current I_{max}. What is I_{max}?
(8)
Ans:
Zener break down takes place in diodes having heavily doped p and n regions with essentially narrow depletion region. Considerable reverse bias gives rise to intense electric field in the narrow depletion region causing breakdown of covalent bonds and so creating a number of electron-hole pairs which substantially add to the reverse current which may sustain at a constant voltage across the junction. This breakdown is reversible.
Problem:
For I_{L} = 0, V_{L}= 50 volts and
I_{z} = I_{s} = (150 – 50) / R £ 40 mA
Hence R ³ 100/40 KW, i.e 2.5 KW
For I_{L} = I_{max}, I_{z} ³ 5mA
But for R = 2.5 KW, I_{s} = 40 mA.
Hence I_{max} = 40 – 5 = 35 mA
Q.40 Draw a figure to
show the output V-I characteristic curves of a BJT in CE configuration. Indicate thereon, the
saturation, active and cut off regions. Explain how, using these
characteristics, one can determine the value of h_{fe} or β_{F}. (6)
Ans:
Fig. 18b
Fig. 18b. shows the characteristics of BJT in CE configuration. To find h_{fe}, draw a constant V_{CE} line (vertical) going through desired Q point. Choose constant I_{B} lines suitably, which cut the constant Vce line at X and Y.
h_{fe} = ΔI_{C}/ ΔI_{B}. From fig h_{fe} = (IC_{2}-IC_{1}) / (IB_{4}-IB_{2})
= (6-2) mA / (60-20) mA =100.
Q.41 Draw a small signal h-parameter equivalent circuit for the CE amplifier shown
in fig below.
Find an
expression for voltage gain of the amplifier.Compute the value of voltage gain,
if R_{C }= R_{L} = 800Ω, R_{1} = 1.5kΩ, R_{2}
= 3kΩ, h_{re}≈ 0, h_{oe} = 100μS, h_{fe}
= 90 and h_{ie} = 150Ω. (9)
Ans:
Fig. 19 shows the small signal h-parameter model for CE amplifier
Fig.19
Voltage gain of amplifier is A_{v} = V_{L} / V_{i}
R_{b} = R_{1}R_{2} / (R_{1} + R_{2}) in the equivalent circuit.
By current division in output circuit,
_{}
_{}
R_{b }= (R_{1}R_{2}) / (R_{1}+R_{2}) = (1.5x10^{3}x3x10^{3}) / (1.5+3)10^{3} = 1kΩ
Av = (-90x800x800) / [150(800+800+100x10^{-6}x800x800) = -230.7
Q.42 The circuit of a
common source FET amplifier is shown in the figure below. Find expressions for
voltage gain A_{v} and current gain A_{i }for the circuit in
mid frequency region where R_{s} is bypassed by C_{s}. Find
also the input resistance R_{in} for the amplifier. If R_{D }=
3kΩ, R_{G }= 500kΩ, μ = 60, r_{ds} =
30kΩ, compute the value of A_{v}, A_{i}, and R_{in}.
(8)
Ans:
Using voltage source model of the FET, the equivalent circuit is as in Fig. 20a
Vo = (-R_{D}μV_{gs}) / (R_{D}+r_{ds})
V_{gs} = V_{i}
A_{v} = V_{o} / V_{i} = (-μR_{D}) / (R_{D}+r_{ds})
i_{d} = (μV_{gs}) / (r_{ds}+R_{D})
V_{gs} = i_{i}R_{G}
A_{v} = (-60x3x10^{3}) / (3x10^{3}+30x10^{3}) = -5.45
A_{i }= i_{d}/i_{i} ; i.e Ai = μR_{G} / (R_{D}+r_{ds}) = [60x500x10^{3}] / [30x10^{3}+3x10^{3}] = 909
It is obvious that R_{in} = R_{G} = 500kΩ
Q.43 State Barkhausen
criterion for sustained oscillations in a sinusoidal oscillator. The
capacitance values of the two capacitors C1 and C2 of the resonant circuit of a
colpitt oscillator are C1 = 20pF and C2 = 70pF.The inductor has a value of
22μH. What is the operating frequency of oscillator?
(5)
Ans:
Consider a basic inverting amplifier with an open loop gain ‘A’. With feedback network attenuation factor ‘ß’ less than unity. The basic amplifier produces a phase shift of 180^{o} between input and output. The feedback network must introduce 180^{o} phase shift. This ensures positive feedback.
Barkhausen criterion states that for sustained oscillation,
1. The total phase shift around the loop, as the signal proceeds from input through the amplifier, feedback network and back to input again, is precisely 0^{o} or 360^{o}.
2. The magnitude of the product of the open loop gain of the amplifier, ‘A’ and the feedback factor ‘ß’ is unity, i.e. |Aß| = 1.
Operating frequency of Colpitts oscillator is given by
f = 1 / (2π√ LC_{eq})
Where C_{eq} = (C_{1}C_{2)} / (C_{1 }+ C_{2})
= (20 x 70) / (20 + 70) = 15.56pF.
f = 1 / {2 x π √ 22 x 10^{-6} x 15.56 x 10^{-9}} = 272.02 KHz
Q.44 Suggest modification in the given circuit of Opamp to make it (i) inverting (ii)
non inverting. (7)
Ans:
Fig 24 a (i) shows an inverting amplifier. For an inverting amplifier, the input is to be applied to the inverting terminal. Therefore point P_{2 }is connected to the signal to be amplified.
Fig 24 a (i) Fig 24 a (ii)
Fig 24 a (ii) shows a non-inverting amplifier. For a non-inverting amplifier, the input is to be applied to the non-inverting terminal. Therefore point P_{1 }is connected to the source.
Q.45 In the circuit of Q44, if input offset voltage is 0,
(i) Find the output voltage V_{o} due
to input bias current, when I_{B}=100nA (3)
(ii) How can, the effect of bias current be
eliminated so that output voltage is
zero? (4)
Ans:
(i) When the voltage gain of op-amp is very large, no current flows into the op-amp. Therefore I_{B }flows into R_{2}
Vo = I_{B} x R_{2} = 100 x 10^{-9} x 10^{6} =100 mV
(ii) If Vo = 0, then R_{1} || R_{2}.
Let Rp=R_{1} || R_{2}
Then voltage from inverting terminal to ground is
V_{I} = -I_{B2} x Rp
Let R^{1} = Rp = (R_{1} x R_{2}) / (R_{1} + R_{2}) = 90.9kΩ
Add resistor R^{1} between non-inverting terminal and ground
Choose the value of R^{1} = 90.9kΩ to make the output voltage as zero.
Since, V_{I} –V_{N} = 0 or V_{I} = V_{N}
where V_{I} : Voltage at the inverting terminal w.r.t. ground
and V_{N} : Voltage at the non-inverting terminal w.r.t. ground
Hence, -IB_{2 }x Rp = -IB_{1} x R^{1}
For IB_{1} = IB_{2}
Q.46 A differential amplifier has inputs V_{s1}=10mV, V_{s}_{2} = 9mV. It has a differential mode gain of 60 dB and CMRR is 80 dB. Find the percentage error in the output voltage and error voltage. Derive the formulae used. (14)
Ans:
In an ideal differential amplifier output V_{o} is given by
V_{o} = A_{d} (V_{1}-V_{2})
A_{d} = gain of differential amplifier
But in practical differential amplifiers, the output depends on difference signal V_{d} as well as on common mode signal V_{C}.
V_{d} = V_{1} – V_{2} ---------- 1
V_{C} = (V_{1} + V_{2}) / 2 --------2
Therefore output of above linear active device can be given as
V_{o} = A_{1}V_{1} + A_{2}V_{2}
Where A1(A2) is the voltage amplification factor from input 1(2) to output under the condition that input 2(1) is grounded.
Therefore from 1 and 2
V_{1} = V_{c} +
0.5V_{d} and V_{2}=V_{c}-0.5V_{d}
V_{o} = A_{d}V_{d} + A_{c}V_{c}
Where A_{d} = 0.5(A_{1}-A_{2}) and A_{c} = 0.5(A_{1}+A_{2})
the voltage gain of difference signal is A_{d} and voltage gain of common mode signal is A_{c}.
Common mode rejection ratio = ρ = |A_{d}/A_{c}|. The equation for output voltage can be written as
V_{o} = A_{d}V_{d} (1+ (A_{d}/A_{c}) (V_{c}/V_{d}))
V_{o} = A_{d}V_{d} (1+ (1 / ρ) (V_{c}/V_{d}))
V_{s1}=10mV = V_{1} , V_{s2}=9mV = V_{2}
A_{d}=60dB, CMRR=80dB
V_{d} = V_{1}-V_{2}=10mV-9mV=1mV
A_{d} = 60dB = 20log_{10} A_{d, }since A_{d} =1000
V_{c} = (V_{1}+V_{2})/2 = (10+9) / 2 = 9.5mV
CMRR = A_{d} / A_{c}
10³ = 1000 / A_{c}
A_{c} = 0.1
V_{o} = A_{d}V_{d} + A_{c}V_{c} = 1000 x 10^{-3 }+ 0.1 x 9.5 x 10^{-6 }
= 1.00095 V
Q.47 Prove the following postulate of Boolean algebra using truth tables
x + y + z = (x + y).(x + z ) (3)
Ans:
The truth table below demonstrates the equality
(x + y + z) = (x + y) (x + z)
X |
y |
z |
(x+y) |
(x+z) |
(x+y)(x+z) |
x+y+z |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
1 |
0 |
0 |
0 |
1 |
0 |
1 |
0 |
0 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
Q.48 Simplify the following Boolean function using K-map:
_ _ _
f(a,b,c) = a c
+ a b + a b c + b c Give the logic
implementation of the simplified function in SOP form using suitable gates. (6)
Ans:
a b c
_
The simplified function by implementation of K-map is f (a,b,c) = a b + c . Assuming the availability of complements, the logic implementation is as in Fig. 40b.
Fig. 40b
PART
– III
DESCRIPTIVES
Q.1 A triangular wave shown in fig(1) is applied to the circuit in fig(2). Explain the working of the circuit. Sketch the output waveform.
Vin
25v
t
-25v
Fig(1)
R
R_{L}
Vin D1 D2
Vout
12v 8v
Fig (2)
Ans:
Vin
+12v
t
-12v
During the positive half-cycle of the input triangular voltage, the diode D_{1} remain forward biased as long as input voltage exceeds battery voltage +12v and diode D_{2} remains reverse biased and acts as open circuit. Thus up to +12v of the applied signal there would be output voltage across the output terminals and the triangular signal will be clipped off above 12v level.
During negative half-cycle of the input signal voltage, diode D_{1} remains reverse-biased while D_{2} remains forward-biased as long as input signal voltage exceeds the battery voltage -8v in magnitude.
Q.2 Define
‘diffusion capacitance’ of a pn junction diode. Obtain an expression for the
same. Why is the diffusion capacitance negligible for a reverse biased diode? (9)
Ans:
When a
P-N junction is forward biased, a capacitance which is much larger than the
transition capacitance, comes into play. This type of capacitance is called the
diffusion capacitance, C_{D}.
Diffusion capacitance is given by the equation, _{} where dQ represents the change in number of minority carriers stored outside the depletion region when a change in voltage across diode, dV, is applied.
If _{}is the mean life-time of charge carriers, then a flow of charge Q yields a diode current I given as
_{}
We know that
So,
So diffusion capacitance _{}
_{}
For a forward bias, _{}
Thus the diffusion capacitance is directly proportional to the forward current through the diode.
C_{D}: Diffusion capacitance.
C_{T}: Transition capacitance.
15
10
5
C_{D}
C_{T}
In a
reverse biased diode both C_{D} and C_{T} are present but C_{T}
>> C_{D}. Hence in a reverse biased diode C_{D} is
neglected and only C_{T} is considered.
Q.3 Draw the circuit of h-parameter
equivalent of a CE amplifier with un by-passed emitter resistor. Derive an expression for (i) its input
impedance and (ii) voltage gain, using the equivalent circuit. (10)
Ans:
V_{S} I_{e} I_{b}
CE – amplifier AC – Equivalent
Circuit with an un-bypassed Emitter Resistor (R_{E}).
CE – Amplifier n –
parameter Equivalent circuit with R_{E}.
Input Impedance:
Zin (base) or Z_{b}
= h_{ie}
With an un-bypassed
emitter register R_{E} in the circuit,
_{}
= _{}.
But _{}.
_{}
_{}
_{}
R_{L})
Voltage Gain:
_{}
_{}
The minus sign indicates that output voltage V_{out} is 180^{0} out of phase with input voltage V_{in}.
With an un-bypassed R_{E}
in the circuit,
_{}
_{}
_{}
Usually _{},
R_{L})
_{}
Q.4 What is a
‘multistage amplifier’? Give the requirements to be fulfilled for an ideal
coupling network. (6)
Ans:
The voltage amplification or power gain or frequency response obtained
with a single stage of amplification is usually not sufficient to meet the
needs of either a composite electronic circuit or load device. Hence, several
amplifier stages are usually employed to achieve greater voltage or current
amplification or both. A transistor circuit containing more than one stage of
amplification is known as a MULTI-STAGE amplifier.
In a multistage amplifier, the output of first-stage is combined to next
stage through a coupling device.
For an ideal coupling network the following
requirements should be fulfilled.
1.
It should not disturb the dc-bias conditions of the amplifiers being
coupled.
2.
The coupling network should transfer ac signal waveform from one
amplifier to the next amplifier without any distortion.
3.
Although some voltage loss of signal cannot be avoided in the coupling
network but this loss should be minimum, just negligible.
4.
The coupling network should offer equal impedance to the various
frequencies of signal wave.
Q.5 Draw a neat sketch to
illustrate the structure of a N-channel E-MOSFET. Explain its operation. (9)
Ans:
N-Channel E-MOSFET Structure
Operation of
N-Channel E-MOSFET
Operation:
It does not conduct when V_{GS} = 0.
In enhancement mosfet drain (I_{D}) current flows only when V_{GS}
exceeds gate-to-source threshold voltage.
When the gate is made
positive with respect to the source and the substrate, negative change carriers
within the substrate are attracted to the +ve gate and accumulate close to the
surface of the substrate. As the gate voltage increased, more and more
electrons accumulate under the gate, these accumulated electrons i.e., minority
charge carriers make N-type channel stretching from drain to source.
Now a drain current
starts flowing. The strength of the drain current depends upon the channel
resistance which, in turn, depends on the number of charge carriers attracted
to the positive gate. Thus drain current is controlled by the gate potential.
Q.6 Show that in an amplifier, the gain reduces if negative feedback is
used. (6)
Ans:
When the feedback voltage (or current) is
applied to weaken the input signal, it is called negative feedback
β
For
an open-loop amplifier,
Voltage again, _{}
Let a fraction (say β) of the output voltage V_{out}, be supplied back to the input and A be the open-loop gain. Now _{}
For + ve feedback case
And _{}
For negative feedback case,
Actual input voltage to amplifier, _{}
_{}
_{}
_{}
Q.7 In a voltage series feedback amplifier, show that
a. the input impedance increases with negative feedback.
b. the output impedance decreases due to negative feedback. (10)
Ans:
The input impedance can be
determined as follows:
_{}
= _{}
Or _{}
_{}
_{}
_{}
_{}
The effect of negative feedback on the output impedance of an amplifier is explained below.
_{}
_{}
_{}
Or _{}
Or _{}
_{}
Thus, series voltage negative
feedback reduces the output impedance of an amplifier by a factor (1 + βA).
Q.8 List the advantages of a crystal oscillator. (4)
` Ans:
Advantages:
1.
It is very simple circuit as it does not need any tank circuit rather
than crystal itself.
2.
Different oscillation frequencies can be had by simply replacing one
crystal with another.
3.
The Q-factor, which is a measure of the quality of resonance circuit of a
crystal, is very high.
4.
Most crystals will maintain frequency drift to within a few cycles at 25^{0}c.
Q.9 Explain how the timer
IC 555 can be operated as an astable multivibrator, using timing diagrams. (8)
Ans:
c = 0.01µF
The Timer -555 As An
Astable Multivibrator
An
astable multivibrator, often called a free-running multivibrator, is a
rectangular-wave generating circuit. The timing during which the output is either
high or low is determined by the externally connected two resistors and a
capacitor.
Internal Circuitary
With External Connections
When Q is low, or output V_{out} is high, the discharging transistor is cut-off and capacitor C begins charging towards V_{cc} through resistances R_{A} and R_{B}. Because of this, the charging time constant is (R_{A} + R_{B})C. Eventually, the threshold voltage exceeds + _{}, comparator 1 has a high output and triggers the flip-flop so that its Q is high and the timer output is low. With Q high, the discharge transistor saturates and pin-7 grounds so that the capacitor C discharges through resistance R_{B}, trigger voltage at inverting input of comparator-2 decreases. When it drops below _{}. The output of comparator 2 goes high and this reset the flip-flop so that Q is low and the timer output is high.
Q.10 Establish from first
principles, the continuity equation, valid for transport of carriers in a
semi-conductor. (10)
Ans:
The continuity equation states a condition of a dynamic equilibrium for
the concentration of mobile carriers in any elementary volume of the
semiconductor.
The
carrier concentration in the body of semiconductor is a function of both time
and distance. The differential equation governing this functional relationship,
called the continuity equation, is based upon the fact that charge can be
neither created nor destroyed.
Consider an infinitesimal element of volume of area a, and length dx, as shown in fig, within which the average hole is p. If τ_{n} is the mean lifetime of holes then P/τ_{n} equals the holes per second lost by recombination per unit volume. If ‘e’ is the electronic charge, then, because of recombination, the number of coulombs per second decreases within the volume and decrease within the volume = _{} ------(1)
If ‘g’ is the thermal rate of generation of electron-hole pairs per unit volume, the number of coulombs per second increases within the volume and increase within the
volume = e.a.dx.g ------(2)
In general, the current varies with distance within the semiconductor. If the current entering the volume at x is I_{n} and leaving at x + dx is _{}
Decrease within the volume = dI_{n}. -------(3)
Because of three effects enumerated
above, the hole concentration must change with time, and the total number of
coulombs per second increases within the volume.
Increase within the volume = _{} ------(4)
Since the charge must be conserved, so
_{} -------(5)
The hole current I_{n} is the sum of drift current and diffusion current so,
_{} ------(6)
If the semiconductor is in thermal
equilibrium with its surroundings and is subjected to no applied fields, the
hole density will attain a constant volume
Under these conditions _{}.
So from the equation (5), we have _{} ------(7)
Combining equations (5), (6) and (7) we have the equation of conservation of charge, called the continuity equation,
_{}
Q.11 What are the
important characteristics of a cascade amplifier? Write the circuit of cascade
amplifier and determine an expression for its voltage gain in terms of its
circuit parameters. (8)
Ans:
Important characteristics:
1.
High input impedance
2.
Low voltage gain
3.
Input Miller capacitance is at a
minimum with the common base stage providing good high frequency operation.
_{}
= _{}.
With a stage gain of only 1, no Miller effect occurs at transistor Q_{1}. Voltage gain of stage-2,
_{}
_{} Over-all voltage gain, _{}.
Q.12 Write a neat sketch to shown the construction of a
depletion-enhancement MOSFET and explain its operation in both the modes. (9)
Ans
DE-MOSFET can be operated with either a positive or a negative gate. When gate is positive with respect to the source it operates in the enhancement. When the gate is negative with respect to the source, it operates in depletion-mode.
When the gate is made negative w.r.t the substrate, the gate repels some of the negative charge carriers out-of the N-channel. This creates a depletion region in the channel and therefore, increases the channel resistance and reduces the drain current. The more negative the gate, the less the drain current.
Q.13 Draw the circuit of Hartley oscillator and derive an expression for
its frequency of oscillation. (10)
Ans:
The Hartley oscillator widely used as a local oscillator in radio receivers.
_{}
--------(1)
Here
_{}, _{} and _{}
Substituting
these values in equation (1), we get
_{}_{}_{}
_{}
Equating
imaginary parts of above equation to zero we get,
While _{}
Or _{}
_{}
Or _{}
Q.14 Write the circuit of current mirror used in a op-amp design and
explain its operation. (8)
Ans:
Current Mirror Circuit
In the design of op-amps, current strategies
are used that are not practical in discrete amplifiers. The new strategies are
prompted by the fact that resistors utilize a great deal of ‘real-estate’, and
precise matching of active devices is very practical since they share same piece
of silicon. One such approach is the use of the current mirrors to bias
differential pairs. The current I_{x}, set by transistor Q_{1}
and resistor R_{x} is mirrored in the current I through the transistor
Q_{2}.
_{} and _{}.
_{}
Since _{}
Q.15 Explain,
using neat circuit diagram and waveforms, the application of timer IC555 as
monostable multivibrator. (9)
Ans:
Trigger Input, Output and Capacitor
Voltage Wave Forms
Internal Circuitry with external connections
Operation:
Initially, when the output at pin-3 is low i.e., the circuit is in a stable state, the transistor is on and capacitor C is shorted to ground, when a negative pulse is applied to pin 2, the trigger input false below _{}, the output of comparator goes high which resets the flip-flop and consequently the transistor turns off and output at pin-3 goes high. As the discharge transistor is cut-off, the capacitor C begins charging towards _{}through resistance RA with a time constant equal to RAC. When the increasing capacitor voltage becomes slightly greater than_{}, the output of comparator-1 goes high, which sets the flip-flop. The transistor goes to saturation, thereby discharging the capacitor C and output of the timer goes low.
Q.16 Write the circuit
diagram of a square wave generator using an opamp and explain its operation. (7)
Ans:
The
circuit’s frequency of oscillation is dependable on the charge and discharge of
a capacitor C through feedback resistor R_{f}. The heart of the
oscillator is an inverting op-amp comparator.
The comparator uses
positive feedback that increases the gain of the amplifier. A fraction of the
output is feedback to the non-inverting input terminal. Combination of R_{f}
and C acting as a low-pass R-C-Circuit is used to integrate the output voltage
V_{out} and the capacitor voltage V_{c} is applied to the
inverting input terminal in place of external signal.
_{} where _{}
When V_{in} is positive, _{} and
When V_{in} is negative, _{}.
Q.17 Distinguish
between synchronous and asynchronous counters.
Show
the logic diagram of a 3-bit UP-DOWN synchronous counter using suitable
flip-flops, with parallel, carry based on NAND gates and explain its operation
drawing wave diagrams. (12)
Ans:
Difference
between synchronous and asynchronous counter :
1.
In synchronous counters synchronized at the same time. But
in the case of asynchronous counter the output of first flip-flop is given as
the clock input of the next flip-flop.
2.
In synchronous counter the output occurs after nth clock
pulse if number of bits are N. But in asynchronous counter the output is
derived by previous one that’s why n+1 step or clock pulse will be required.
Design
of 3 bit UP DOWN counter:-
For
M = 0, it acts as an UP counter and for M = 1 as a DOWN counter. The number of
flip-flop
required is 3. The input of the flip-flops are determined in a manner similar
to the following table.
Truth
Tables
Direction |
Present State |
Required FlipFlop |
|||||||
M |
Q_{3} |
Q_{1} |
Q_{0} |
J_{0} |
K_{0} |
J_{1} |
K_{1} |
J_{2} |