DipIETE – CS (OLD SCHEME)

 

Code: DC04                                                                 Subject: COMPUTER ORGANISATION

Flowchart: Alternate Process: DECEMBER 2009 Time: 3 Hours                                                                                                     Max. Marks: 100

 

 

NOTE: There are 9 Questions in all.

·      Question 1 is compulsory and carries 20 marks. Answer to Q.1  must be written in the space provided for it in the answer book supplied and nowhere else.

·      Out of the remaining EIGHT Questions answer any FIVE Questions. Each question carries 16 marks.

·      Any required data not explicitly given, may be suitably assumed and stated.

 

 

Q.1 .     Choose the correct or the best alternative in the following:                                (2  10)

       

a.       The Boolean expression is equal to

 

                   (A)  A+B                                            (B)  

                   (C)                                         (D)  AB

       

b.      One of the major difference between a combinational logic circuit such as a decoder and a Storage circuit such as an RS latch is that:

 

(A) The storage circuit requires a different class of gates

(B)  The storage circuit requires a clock input

(C)  The storage circuit uses feedback

(D)  The storage circuit has no propagation delay

 

c.       The Instruction Set Architecture of a microprocessor specifies (among          other things)

 

(A)    The address space available to the processor.                                                           

(B)  The memory addressing modes to be used by instructions.

(C)   The native data types of the microprocessor.                                                            

(D)  All of the above

 

             d.   The Program Counter may be defined as a

 

(A)     Binary counter that keeps track of the number of instructions executed.

(B)     Register that stores the next instruction to be executed.

(C)     Register that stores the address of the next memory location to be written to.

(D)  Register that stores the memory address of the next instruction.

       

             e.   What logic circuit would you use for addressing memory?

 

                   (A)  Full adder                                     (B)  Multiplexer

                   (C)  Decoder                                       (D)  Direct Memory Access circuit

 

            

 

             f.    How many memory locations are required to store the instruction LXIH, 0800H in an 8085 Assembly language program?

 

                   (A)   1                                                 (B) 2

                   (C)   3                                                 (D) 4

       

             g.   How many select lines do 8 input multiplexer have?

 

(A)  1                                                  (B)  3

(C)  8                                                  (D)  64

 

h.  Reading and writing to the memory unit (RAM or off-processor memory) takes via the:

                  

                   (A)  ALU and the register unit             

                   (B)  Memory address and memory data registers

(C)  Program counter and the memory data register           

(D)  Input/output

 

             i.    The Transformation of data from main memory to cache memory is ___________ process.

 

(A)  Mapping                                      (B)  Hit ratio

(C)  DMA                                           (D)  None of the above

 

             j.    Booth Algorithm is used to ________ two integral numbers.

 

(A) ADD                                             (B)  multiply

(C)  Both (A) and (B)                          (D)  None of the above

       

 

Answer any FIVE Questions out of EIGHT Questions.

Each question carries 16 marks.

 

 

  Q.2     a.   What do you understand by level of memory hierarchy? Discuss various design consideration of memory hierarchy.                                            (10)

 

b.   Write different types of RAM? Write the features of SRAM.                              (6)

     

  Q.3     a.  Give Flynn’s classification of parallel computer architecture. Also discuss each class in brief.             (8)

 

             b.   Write a short note on vector processor.                                                              (8)

 

  Q.4     a.   Discuss DMA controller operation with the help of a block diagram.                   (8)

                  

             b.   Explain why I/O interfaces are used to interface I/O devices to the system. Discuss the uses of I/O bus to I/O interface/controller.                        (8)

            

 

 

  Q.5     a.   Write a program to evaluate the arithmetic expression X= (A+B)*(C+D)

                   (i)  Using the general register type computer with three address instructions.

                   (ii) Using an accumulator type computer with one address instruction.                  (8)

 

             b.   A digital computer has a memory unit with 24 bits per word. The instruction set consists of 190 different operations. Each instruction is stored in one word of memory and consists of an Opcode part and address part.                                                   

                   (i)   How many bits is needed for operation code?

                   (ii)  How many bits are left for the address part of the instruction?

                   (iii) How many words can be accommodated in the memory unit?                       (8)

       

  Q.6     a.   Discuss IEEE standard for floating point numbers.                                               (6)

 

b.   Multiply decimal -5 by decimal -6 using Booth’s algorithm.                               (10)

 

  Q.7     a.   What is the function of cache memory? Explain the terms cache hit and cache miss. Also explain the writing methods in cache memory.                   (6)

                  

             b.   Discuss the Hardwired control unit with block diagram.                                     (10)

 

  Q.8     a.   Write a program in assembly language that checks whether a number is even or odd.                      (10)

 

             b.   Design a 4 bit binary adder-subtractor. (6)

 

  Q.9           Write short notes on the following (Any TWO):

 

                   (i)           Pseudo-instructions.

                   (ii)          Instruction Pipelining.

                   (iii)         Associative memory.                                                              (82 = 16)