AMIETE – CS/IT (NEW SCHEME)   –   Code: AC58/AT58

 

Subject: COMPUTER ORGANIZATION

Flowchart: Alternate Process: DECEMBER 2009Time: 3 Hours                                                                                                     Max. Marks: 100

 

 

NOTE: There are 9 Questions in all.

·      Question 1 is compulsory and carries 20 marks. Answer to Q.1 must be written in the space provided for it in the answer book supplied and nowhere else.

·      Out of the remaining EIGHT Questions answer any FIVE Questions. Each question carries 16 marks.

·      Any required data not explicitly given, may be suitably assumed and stated.

 

 

Q.1       Choose the correct or the best alternative in the following:                                  (210)

                

             a.  In logical right shifting the fill_in bits are

 

                  (A) always 0                                         (B) always 1

                  (C) sign bit must be repeated                (D) MSB must be repeated

 

             b. Which amongst the following refers to Absolute addressing mode    

 

                  (A) move R1, R2                                  (B) move LOC1, LOC2

                  (C) move LOC1, R2                            (D) move LOC2, R1

 

             c.  SCSI refers to  

 

                  (A) Serial Computer System Interface

                  (B) Small Computer System Interface

                  (C) Synchronous Computer System Interface

                  (D) Static Computer Signal Interface

 

             d.  If an address code  is applied to 256 bit RAM, which row and column will be selected?

 

 

                  (A) 12th row, 9th column                       (B) 9th row, 12th column

                  (C) 25th row, 1st column                       (D) 4th row, 8th column

 

             e.  In 32 bit CLA, final carry appears after

 

                  (A) 16 gate delays                                (B) 17 gate delays

                  (C) 18 gate delays                                (D) 15 gate delays

 

             f.   5 data bytes are pushed into a RAM stack beginning at address.  What is the top of the stack address after the data are loaded?  

 

                  (A) 11C0 H                                         (B) 11BA H

                  (C) 11B0 H                                          (D) 1101 H

 

 

             g. DDR RAM has bandwidth

 

                  (A) double that of SDRAM                  (B) half that of SDRAM

                  (C) same as SDRAM                           (D) None of the above

             h.  CCD (Charge Coupled Device) is   

 

(A)  Magnetic device                             (B) MOS device

                  (C) Bipolar semiconductor device         (D) None

       

             i.   In bit pair recoding of multipliers, the summands for n bit operands   

 

                  (A)                                                (B) n

                  (C)                                                  (D)

 

             j.   When 2n bit binary numbers are added, the sum will contain at the most    

 

                  (A) n bits                                              (B) n+1 bits

                  (C) n+2 bits                                          (D) n+n bits

 

 

 

Answer any FIVE Questions out of EIGHT Questions.

Each question carries 16 marks.

 

 

 

  Q.2     a.   List and explain the developments made during different generations of computers.              (2+6)

                  

             b.   Explain basic instruction types with the help of examples.                                    (8)

 

  Q.3     a.   Differentiate between Logical and Arithmetic shift with help of examples.             (8)

                  

             b.   Consider the following possibilities for saving the return address of a subroutine

                   (i)    In a processor register.

                   (ii)  In a memory location associated with the call so that different location is used when the subroutine is called from different places.

                   (iii)  On a stack.

                   Which of these possibilities supports subroutine nesting and which supports subroutine recursion (subroutine calling itself)?                                       (8)

 

  Q.4     a.   Explain the interrupt priority scheme when there are simultaneous requests from 2 or more devices.              (8)

       

             b.   Discuss the concept of “Direct Memory Access”.  How is data transferred using DMA.                  (8)

       

  Q.5     a.   Explain any 2 cache mapping functions.                                                          (4+4)

                  

             b.   What is ROM?  Explain, diagrammatically the working of a ROM cell.  Also identify and differentiate between the various types of ROM.       (8)

 

  Q.6     a.   Show that the worst case delay through an  array is  gate delays.              (8)

 

             b.   Multiply the pairs of signed numbers

                   -13 (multiplicand)

                   11 (multiplier)                                                                                               (4+4)

 

 

 

Q.7                                                                        a.   Define a USB.  What are the key objectives that a USB addresses?  Explain.

                                                                                                                                        (8)

 

             b.   List any four SCSI bus signals.  Mention the category to which they belong & the function they perform.                                                                (8)

 

  Q.8     a.   Explain the basic concept of microprogrammed control.                                      (8)

 

             b.   What is a branch instruction?  Write the control sequence that implements an unconditional branch instruction.                                                                                                         (8)

            

  Q.9     a.   Explain virtual memory.                                                                                      (8)

 

             b.   A disk unit has 24 recording surfaces.  It has a total of 14,000 cylinders.  There is an average of 400 sectors per track.  Each sector contains 512 bytes of data.

                   (i)  What is the maximum number of bytes that can be stored in this unit?

                   (ii) What is the data transfer rate in bytes per second at a rotational speed of 7200 rpm?                 (8)