AMIETE – CS (OLD SCHEME)
NOTE: There are 9 Questions in all.
· Question 1 is compulsory and
carries 20 marks. Answer to Q.1 must be written in the space provided for it in
the answer book supplied and nowhere else.
· Out of the remaining EIGHT
Questions answer any FIVE Questions. Each question carries 16 marks.
· Any required data not
explicitly given, may be suitably assumed and stated.
Q.1 Choose
the correct or the best alternative in the following: (210)
a.
Conversion of the decimal number into signed binary word results into
(A) 1111 0011 0111
0100 (B) 0000 1100 1000
1100
(C) 1111 0011 0111
0011 (D) 1000 0011
0111 0100
b.
Determine the memory location addressed by the following real mode
80286 register combination: DS=2000H and SI =1002H.
(A) 30020H (B)
21002H
(C) 12020H (D)
None
of these.
c.
In what order registers are placed on the stack by the PUSHA
instruction?
(1) AX. |
(2) CX |
(3) DX |
(4) BX |
(5) SP and BP |
(6) DI and SI |
(A) 6-5-4-3-2-1 (B) 6-5-4-2-3-1
(C) 1-2-3-4-5-6 (D) 6-5-4-1-2-3
d.
Which instruction converts the contents of the AL register into a
number stored at the memory location addressed by BX+AL?
(A) XCHG BX, AL (B) MOV BX, AX
(C) XLAT (D) None of
these.
e. If DL=0F3H and BH=72H, list the difference after BH
subtract from DL, and show the contents of the flag register bits.
(A) Difference =
81H,C=0,A=0,S=1,Z=0, and O=0
(B) Difference =
81H,C=1,A=0,S=1,Z=0, and O=0
(C) Difference =
81H,C=0,A=0,S=0,Z=0, and O=0
(D) Difference =
81H,C=0,A=0,S=1,Z=0, and O=1
f.
The _________ bus architecture supports 32 bit / 64 bit transfers
between personal computer and memory or I/O at rates 33 MHz.
(A) PCI (B)
EISA
(C) ISA (D)
(B) and (C)
g. Which of the following instructions does not
apply to interrupts?
(A) BOUND (B)
INT
(C) INTO (D)
XLAT
h. Which of the following
is true with respect to memory?
(A) SRAM requires memory refreshing.
(B) Synchronous dynamic RAM (SRAM) is used with most newer system because of its speed.
(C) ROM is volatile memory.
(D) RAM is non-volatile.
i.
The DMA controller select the I/O device used during a DMA
transfer by which pins?
(A) DACK3-DACK0 (B) HLDA
(C) READY (D) A3-A0.
j. When memory
manager is in use, the 80286 addresses ________ bytes of virtual memory
(A) 1K (B) 1M
(C) 1G (D) 8G
Answer any FIVE Questions out
of EIGHT Questions.
Each
question carries 16 marks.
Q.2 a. Discuss A/D
conversion and its interfacing with microprocessor. (6) (6)
b. Compare 8085
and 8086. (4)
c. Explain real mode addressing and protected
mode addressing. (6)
Q.3 a. What
is the use of the following pins on 8086? (6)
(i) DEN (ii) HOLD
(iii) S7 (iv) IO or M
b. Compare 80486 and
Pentium based on data bus width, address bus width and memory size. (4)
c. Explain interrupt vector table. Explain software interrupt instruction BOUND
and INTO. (6)
Q.4 a. Explain 8087 arithmetic coprocessor architecture. (6)
b. Discuss Mode 2 Bi-directional operation of
Programmable Peripheral Interface 8255. (5)
c. Write 8086
assembly language program to input a string of characters (using a loop) and
stores each character in an array. Redisplay the array at the end of the
program.(Hint. use services 01 & 02 of DOS.) (5)
Q.5 a. Explain following 8086 assembly instructions with an example and their effect on flag register:-
(i)
DIV BYTE
PTR[BP] (ii) LEAVE
(iii) XLAT (iv) DAS
(v) JCXZ (vi) SCAS (12)
b. Explain
following instructions in 8087 math co-processor :
(i) FINIT (ii) FTST
(iii)
FPTAN (iv)
FWAIT (4)
Q.6 a. Discuss ISA bus
and need of EISA bus. (7)
b. What is the need of
DMA data transfer ? Explain the operation of HOLD and HLDA DMA control signals.
Discuss function of the 8237 DMA controller when used for DMA transfers. (9)
Q.7 a. What
is Signed saturation? (2)
b. Explain MMX technology and its instruction set. (7)
c. Write 8086 assembly language program to find a maximum number from a given set of numbers. (7)
Q.8 a. Write an 8086 assembly program for the
following:
The address of memory location is
located at two successive locations: a_addr and a_addr+1. Transfer the contents
of memory location from a_addr to another location b_addr. (4)
b. Explain any THREE of the following: (12)
(i) Minimum mode vs maximum mode
(ii) 80486 microprocessor
(iii) Address
decoding of memory
(iv) Super scalar
architecture
(v) Serial I/O communication.
Q.9 Explain any FOUR
of the following: (16)
1. Memory Paging |
2. PCI bus. |
3. Virtual mode addressing. |
4. Six digit display interface using 8279. |
5. 8086 bus timing. |