Code: DC-04                                                                Subject: COMPUTER ORGANISATION

Time: 3 Hours                                                                                                     Max. Marks: 100

NOTE: There are 9 Questions in all.

· Question 1 is compulsory and carries 20 marks. Answer to Q.1 A. must be written in the space provided for it in the answer book supplied and nowhere else.

· Out of the remaining EIGHT Questions answer any FIVE Questions. Each question carries 16 marks.

· Any required data not explicitly given, may be suitably assumed and stated.

Q.1 A.   Choose the correct or best alternative in the following:                                         (2x10)

a. Logic X-OR operation of  &  results

(A)  AACB                                         (B)  0000

(C)   FFFF                                          (D)  ABCD

b. When CPU is executing a Program that is part of the Operating System, it is said to be in

(A) Interrupt mode                             (B)  System mode

(C)  Halt mode                                    (D)  Simplex mode     

             c.   An n-bit microprocessor has

(A)  n-bit program counter                  (B)  n-bit address register

(C)   n-bit ALU                                   (D)  n-bit instruction register

             d.   Cache memory works on the principle of

(A)  Locality of data                           (B)  Locality of memory

(C)  Locality of reference                    (D)  Locality of reference & memory         

             e.   The average time required to reach a storage location in memory and obtain its contents is

(A) Transfer time                                (B)  Access time

(C)  Seek time                                     (D)  Response time

             f.    In computers, subtraction is carried out generally by

(A) 1’s complement method.              (B)  2’s complement method.

(C)  signed magnitude method.             (D)  BCD subtraction method.

             g.   PSW is saved in stack when there is a

(A) interrupt recognised                      (B)  execution of RST instruction

(C) execution of CALL instruction       (D)  All of these

h.   The multiplicand register & multiplier register of a hardware circuit implementing booth’s algorithm have (11101) & (11100).  The result shall be   

(A) (B) 

(C) (D)

             i.    The circuit converting binary data in to decimal is

(A) Encoder.                                       (B)  Multiplexer.

(C)  Decoder.                                      (D)  Code converter.

             j.    A three input NOR gate gives logic high output only when

                   (A)  one input is high.                           (B)  one input is low.

(C)  two inputs are low.                       (D)  all inputs are low.

Answer any FIVE Questions out of EIGHT Questions.

Each question carries 16 marks.

Q.2     a.   With neat flow chart, explain the process of multiplication of floating point numbers.           (8)

             b.   Divide  by  by using binary division algorithm Show all steps.                     (8)

Q.3     a.   Give your comment on these following register transfer statements

(i)

(ii)

(iii)

(iv) (8)

b.    (i) How many 128 x 8 RAM chips are needed to provide a memory capacity of 2048 bytes?

(ii) How many lines of the address bus must be used to access 2048 bytes of memory? How many of these lines will be common to all chips?

(iii) How many lines must be decoded for chip select? Specify the size of the decoders.                   (8)

Q.4     a.   Explain the followings with examples:-

(i) Memory-reference instructions.

(ii) Input-output instructions.

(iii) Program control instructions.                                                          (3+2+3)

b.   What do you mean by effective address of data?  List any four addressing modes. How is effective address calculated for them?                             (2+6)

Q.5     a.   Write a program by using two-addressing & one-addressing format to evaluate. 

Where A,B,……H are memory addresses.                                                        (8)

     b.   Define interrupt. Why priority of interrupt is required?  How it is resolved?          (8)

  Q.6     a.   Differentiate between synchronous and asynchronous data transfer method.         (6)

             b.   Write a assembly language program to find the square root of a 8-bit number.  Give its flow chart.                                                             (10)

Q.7     a.   What is page fault and how page fault is handled by memory management software?                       (6)

b.   Discuss the different mapping techniques used for cache memory.  What is the need of mapping techniques?                                                                                                                        (10)

Q.8     a.   Draw the logic diagram of a logic circuit capable of performing X-OR, NOR, NAND, complement operation of two bits A and B.  During complement operation, the circuit should be capable of complementing B.                                (6)

             b.   Draw the logic circuit using D flip flop for implementing circular shift left operation and circular shift right operation under control input.               (6)

c.   What do you mean by virtual and physical address of memory?  Explain with an example.               (4)

Q.9           Write short notes on any TWO:-

(i) Hardware polling.

(ii) Arithmetic pipe lining.

(iii) Common bus architecture.                                                                    (16)