DipIETE – CS (OLD SCHEME)
NOTE: There are 9 Questions in all.
· Question 1 is compulsory and carries 20 marks. Answer to Q.1 must be written in the space provided for it in the answer book supplied and nowhere else.
· Out of the remaining EIGHT Questions answer any FIVE Questions. Each question carries 16 marks.
· Any required data not explicitly given, may be suitably assumed and stated.
Q.1 Choose the correct or the best alternative in the following: (2 10)
a. While performing operations the ALU takes data from the temporary storage area inside the CPU named
(A) Floppy Disk. (B) RAM.
(C) Registers. (D) CD (Compact Disk).
b. Which of the two following statements are true?
(A) Cache memory is used to increase the memory size.
(B) Cache memory is used to store program or data currently being executed.
(C) Cache memory used to decrease memory size.
(D) Cache is used to increase the speed of memory.
c. In_____________ type of addressing, the address part of the instruction designate an address of a memory word in which the address of memory word is found.
(A) Indirect address (B) Direct address
(C) Random address (D) All of the above
d. Which of the following is not a register reference instruction?
(A) CLA (B) CIR
(C) ISZ (D) None of the above
e. Zero address instructions are applied in a special memory organisation, called
(A) Program Counter. (B) Instruction Decoder.
(C) Stack. (D) None of the above.
f. Which of the following statement is true:
(A) A floating point is normalised if the most significant digit of mantissa is zero.
(B) A floating point is normalised if the most significant digit of mantissa is non zero.
(C) A floating point is normalised if the most significant digit of exponent is non zero.
(D) A floating point is normalized if the most significant digit of exponent is zero.
g. Which of the following represent occurrence of two events?
(A) P?R4 R2 (B) P*R3 R2
(C) P: R2 R1,R4 R3 (D) P:R2 R1
h. In a computer with 16-bit word the largest signed number is
(A) 216. (B) 216-1 + 1.
(C) 216 – 1. (D) 216 + 1.
i. If an instruction goes through four stages i.e, from FETCH to EXECUTE, then in a pipelined (4 stage) structure, the time taken for seven instruction will be:
(A) 21 units. (B) 10 units.
(C) 12 units. (D) None of the above.
j. In reverse polish notation, A+B*C becomes
(A) AB*C + (B) ABC* +
(C) ABC + * (D) None of the above.
Answer any FIVE Questions out of EIGHT Questions.
Each question carries 16 marks.
Q.2 a. Write down the difference between computer operation and micro operation. (4)
b. Simplify the Boolean function.
F(A,B,C) = (6)
c. Explain the 4 bit reflected binary gray code with the table and its advantage. (6)
Q.3 a. Explain the meaning of stored program concept. Give the utility of it by a suitable example. (6)
b. What are the type of shift-micro-operations? Explain any one with example. (6)
c. Show through diagram a conditional data transfer timings. (4)
Q.4 a. Design the accumulator logic of a simple processor with just ‘AND’, ‘ADD’, ‘SHR’ & ‘CLR’ instruction, along with data transfer. (10)
b. What are different type of control organisations of a CPU? Explain (6)
Q.5 a. Draw a flowchart for hardware multiply algorithm. (4)
b. What is pipelining? Explain Arithmetic pipelining with example. (4)
c. What are the different Pseudo instructions in Assembly language? (4)
d. Explain the working of an address symbol table. (4)
Q.6 a. Explain Booth algorithm for signed number multiplication of two binary numbers with suitable example. (8)
b. Define the term polling. Why it is required? (4)
c. What is memory mapping? Explain. (4)
Q.7 a. What is the main limitation of programmed I/O, Interrupt driven I/O and how it is overcome by DMA system? (6)
b. What are various pseudo instructions that are recognized by an assembler? (5)
c. What do you understand by cache memory? Give the reason behind the cache size being small. (5)
Q.8 a. What is the difference between a direct and an indirect address instruction? How many references to memory are needed for each type of instruction to bring an operand into a processor register? (8)
b. Enumerate the differences between dynamic RAM and static RAM, explain their technologies. (8)
Q.9 Write short notes on the following:
(i) Associate Memory
(ii) Interrupt driven I/O
(iii) Flowchart for Integer division
(iv) Any two addressing Modes (44 = 16)