AMIETE – CS (OLD SCHEME)
Code: AC23 Subject: MICROPROCESSOR BASED SYSTEM DESIGN
Time: 3
Hours
Max. Marks: 100
NOTE: There are 9 Questions in all.
· Question 1 is compulsory and carries 20 marks. Answer to Q. 1. must be written in the space provided for it in the answer book supplied and nowhere else.
· Out of the remaining EIGHT Questions answer any FIVE Questions. Each question carries 16 marks.
· Any required data not explicitly given, may be suitably assumed and stated.
Q.1 A Choose
the correct or the best alternative in the following: (2
10)
a. Data bus width and memory size for Pentium-II processor is
(A) 32 bit and 32 Gb. (B) 32 bit and 64 Gb.
(C) 64 bit and 64 Gb. (D) 64 bit and 32 Gb.
b. Memory location addressed by the DS=1A00H and ECX=00002000H in real mode Pentium-IV register combination is
(A) 1C000H. (B) 1A200H.
(C) 21A00H. (D) 3A000H.
c. Suppose that DS=12000H, BX=0100H and SI=0250H. The address accessed by instruction MOV DL, [BX+100H] is (real mode operation)
(A) 12000H. (B) 12200H.
(C) 12250H. (D) 25200H.
d.
When 
is at logic 1,
the microprocessor is ready for
(A) Receiving data.
(B) Transmitting data.
(C) Both transmit & Receive data.
(D) Disable Data transmit and Receive.
e. DRAM controller is used to perform the task of
(A) Address multiplexing.
(B) Generating DRAM control signals.
(C) Both (A) and (B).
(D) None.
f. If a processor is having 18 address lines, it has a memory addressing capacity of
(A) 256 Kb. (B) 512 Kb.
(C) 128 Kb. (D) 1 Gb.
g. The frequency range (Input) of 8254 timer is
(A) DC to 5 MHz. (B) DC to 10 MHz.
(C) 5 MHz to 10 MHz. (D) 1 MHz to 5 MHz.
h. Number of IC8259 required to have 64 interrupt inputs are
(A) 8. (B) 9.
(C) 10. (D) 01.
i. EISA Bus at 8 MHz can transfer data that are
(A) 32 bit wide. (B) 16 bit wide.
(C) 8 bit wide. (D) 64 bit wide.
j. Number of 16 bit timers in 80186 are
(A) 4 timers. (B) 3 timers.
(C) 2 timers. (D) No timer inside 80186.
Answer any FIVE Questions out of EIGHT Questions.
Each question carries 16 marks.
Q.2 a. Explain the Protected mode addressing. (6) (6)
b. Why is programming model of the 8086 through the Pentium IV considered to be program visible? Discuss the two types of registers (with examples) present in the programming model. (4)
c. What are the contents of system area in a personal computer? Explain. (6)
Q.3 a. Write a Program to find the square of n numbers stored in memory, save the result in n consecutive locations. (8)
b. Explain the stack addressing modes with suitable examples. (4)
c. Explain the function of the following directives (4)
(i) STRUC (ii) USES
(iii) FAR (iv) EQU
Q.4 a. Explain the operation of 8086 in maximum mode with suitable Diagram. (8)
b. With neat timing diagram explain write bus cycle in 8088 in minimum mode. (4)
c. What are the signals required to Demultiplex address and data bus in 8086? Explain the Demultiplexing process. (4)
Q.5 a. What is the basic difference between memory interfacing in 8088 and 8086. Explain the memory interfacing of 8086 with Diagram. (8)
b. Draw the diagram and explain the generation of I/O port addresses, F0H to F7H using a 3x8 decoder to interface Microprocessor with 8 I/O devices. (5)
c. What are the methods of Interfacing I/O with Microprocessor? Define any one. (3)
Q.6 a. Write down the Control word for 8255 and explain the interfacing of LCD display with it. (6)
b. What are the different modes of operation of 8254. Explain them with applications. (6)
c. What is DMA operation? Explain. (4)
Q.7 a. Explain the working of 8087 with the help of it’s control and status Register. (8)
b. Why 80186 is often called embedded controller. Give it’s basic features and explain. (8)
Q.8 a. Give the functions of following instructions in 80286. (6)
(i) CLTS (ii) LAR
(iii) ARPL (iv) VERW
b. Explain the memory management in 80386. (10)
Q.9 Write short note on “ANY FOUR” of the following: (16)
(i) RTOS
(ii) EISA Bus
(iii) Network adapters
(iv) RS-232C
(v) Interrupt controller
(vi) Hardware Interrupts in INTEL family Processors