NOTE: There are 9 Questions in all.
· Question 1 is compulsory and
carries 20 marks. Answer to Q.1 A. must be written in the space provided for it
in the answer book supplied and nowhere else.
· Out of the remaining EIGHT
Questions answer any FIVE Questions. Each question carries 16 marks.
· Any required data not
explicitly given, may be suitably assumed and stated.
Q.1 A. Choose
the correct or best alternative in the following: (2x10)
a. (2FAOC)16 is
equivalent to
(A) (195 084)10 (B) (0010 11111010 0000 1100)2
(C) Both (A)
and (B) (D)
None of these
b. The average time required to reach a storage location in memory and obtain its contents is called the
(A)
seek
time (B)
turnaround time
(C) access time (D)
transfer time
c. Which of the following is not a weighted code?
(A) Decimal Number system (B) Excess 3-code
(C) Binary number System (D)
None of these
d. The idea of cache memory is based
(A)
on the property of locality of reference
(B) on the heuristic 90-10 rule
(C)
on the fact that references generally tend to cluster
(D) all of the above
e. _________ register keeps track of the instructions stored in program stored in memory.
(A) AR (Address Register) (B) XR
(Index Register)
(C) PC (Program Counter) (D) AC (Accumulator)
f. The
addressing mode used in an instruction of the form ADD X Y, is
(A) Absolute (B)
indirect
(C) index (D) none of these
g. If memory access takes 20 ns with cache and 110 ns with out it, then the ratio(cache uses a 10 ns memory) is
(A) 93
% (B) 90 %
(C) 88 % (D) 87 %
h. In a memory-mapped I/O system, which of the following instruction will not be there?
(A)
LDA (B) IN
(C) ADD (D) OUT
i. In a vectored interrupt
(A) the branch address is assigned
to a fixed location in memory
(B) the interrupting source supplies the branch
information to the processor trough an interrupt vector
(C) the branch address is obtained from a
register in the processor
(D) none of the above
j. Von Neumann architecture is
(A) SISD (B) SIMD
(C) MIMD (D) MISD
Answer any FIVE Questions out
of EIGHT Questions.
Each
question carries 16 marks.
Q.2 a. Karnaugh Maps are useful for finding minimal
implementations of Boolean expressions with only a few
variables. Using the following K-Map:
(i) Find
the minimal sum of products expression. Show your groupings.
(ii) Find the minimal product of sums
expression. Show your groupings.
(iii) Are your solutions unique? If not, list
and show the other minimal expressions.
(iv) Does the minimal product of sums expression
equal to minimal sum of products expression? (8)
|
Ab |
||||
cd |
|
00 |
01 |
11 |
10 |
00 |
0 |
0 |
X |
1 |
|
01 |
0 |
0 |
0 |
0 |
|
11 |
0 |
0 |
0 |
1 |
|
10 |
0 |
0 |
X |
1 |
b. A half-adder is a combinational logic circuit that has two inputs, x and y, and two outputs, s and c, that are the sum and carry-out, respectively, resulting from binary addition of x and y.
(i) Design a half-adder as a two-level AND-OR circuit.
(ii) Show how to implement a full adder, by using
half adders. (8)
Q.3 a. Simplify the following Boolean functions using four-variable maps:
(i) F(w,x,y,z)
= Σ (1,4,5,6,12,14,15)
(ii) F(A,B,C,D) = Σ (0,1,2,4,5,7,11,15)
(iii) F(w,x,y,z) = Σ
(2,3,10,11,12,13,14,15)
(iv) F(A,B,C,D) = Σ (0,2,4,5,6,7,8,10,13,15). (8)
b. What is an instruction? With examples explain
three, two, one, zero address instructions. (8)
Q.4 a. Explain Booths algorithm for multiplying two
signed binary numbers. (10)
b. A Computer uses a memory unit with 256 K
words of 32 bits each. A binary instruction code is stored in one word of
memory. The instruction has four parts: an indirect bit, an operation code, a
register code part to specify one of 64 registers, and an address part. (6)
(i) How many bits are there in the operation code, the register code part, and the address part?
(ii) Draw the instruction word format and indicate the number of bits in each part.
(iii) How many bits are there in the data and address inputs of the memory?
Q.5 a. What
is a micro-operation? List and explain the four categories of the most common micro-operations. (5)
b. The following transfer statements specify a
memory. Explain the memory operation in each case (3)
(i) (ii)
(iii)
c. Discuss Direct Memory Access in detail. (8)
Q.6 a. Explain the concept of virtual memory with
the help of diagrams. Explain how virtual address in mapped to actual physical
address. (8)
b. Differentiate
between : (8)
(i) Isolated I/O and memory-mapped I/O
(ii) Source Initiated and Destination Initiated transfer using handshaking
Q.7 a. Differentiate between hardwired control and micro programmed control. Draw the block diagram of a basic hardwired control organisation with two decoders , a sequence counter and a number of control logic gates? (8)
b. What
is the difference between a direct and an indirect address instruction? How
many references to memory are needed for each type of instruction to being an
operand into a processor register? (5)
c. List any two (3)
(i) Register reference instructions
(ii) Memory reference instructions
(iii) Input-Output instructions
Q.8 a. What
is the function of interrupt facility in a multiprogram environment? Explain
how a source routine is initiated for the input or output transfer. Lists the
tasks which this service routine is supported to perform. (8)
b. Write an assembly language program to :
(i) input a character & store it in memory
(ii)
add two numbers (8)
Q.9 a. Explain what is meant by a cache memory. What general principles are
used to make effective use of cache memory? (8)
b. What is associative memory? Explain with the help of a block diagram.
Also mention the situation in which associative memory can be effectively
utilized. (8)