NOTE: There are 9 Questions in all.
· Question 1 is compulsory and carries 20 marks. Answer to Q.1 A. must be written in the space provided for it in the answer book supplied and nowhere else.
· Out of the remaining EIGHT Questions answer any FIVE Questions. Each question carries 16 marks.
· Any required data not explicitly given, may be suitably assumed and stated.
Q.1 A. Choose the correct or best alternative in the following: (2x10)
a. The circuit used to store one bit of data is known as
(A) Encoder (B) OR gate
(C) Flip Flop (D) Decoder
b. Cache memory acts between
(A) CPU and RAM (B) RAM and ROM
(C) CPU and Hard Disk (D) None of these
c. Write Through technique is used in which memory for updating the data
(A) Virtual memory (B) Main memory
(C) Auxiliary memory (D) Cache memory
d. Generally Dynamic RAM is used as main memory in a computer system as it
(A) consumes less power (B) has higher speed
(C) has lower cell density (D) needs refreshing circuitary
e. In signed-magnitude binary division, if the divident is (11100)2 and divisor is (10011)2, then the result is
(A) (00100)2 (B) (10100)2
(C) (11001)2 (D) (01100)2
f. Virtual memory consists of
(A) static RAM (B) Dynamic RAM
(C) Magnetic memory (D) None of these
g. In a program using subroutine call instruction, it is necessary
(A) Initialise program counter (B) Clear the accumulator
(C) Reset the microprocessor (D) Clear the instruction register
h. A Stack-organised Computer uses instructions of
(A) Indirect addressing (B) Two-addressing
(C) Zero addressing (D) Index addressing
i. If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be
(B) 11 bits (B) 21 bits
(C) 16 bits (D) 20 bits
j. A D-Flip Flop can be converted into T-Flip Flop by using additional logic circuit
(A) (B)
(C) (D)
Answer any FIVE Questions out of EIGHT Questions.
Each question carries 16 marks.
Q.2 a. With neat flow chart, explain binary division process. (8)
b. Multiply +.1001x2–0011 and –.1010x2–0001 using binary multiplication algorithm. Show all steps. (8)
Q.3 a. Describe through diagram how matched word can be read out from an associative memory. (8)
b. Give the hardware implementation of following
(i)
(ii) If (q=1), then else (8)
Q.4 a. Briefly discuss the steps followed in designing a CPU. (8)
b. What are the types of instructions that are included in an instruction set? Give two examples of each type. (8)
Q.5 a. The following program is stored in the memory unit of the basic computer. Show the contents of the AC, PC, and IR (in hexadecimal), at the end, after each instruction is executed. All numbers listed below are in hexadecimal. (8)
Location |
Instruction |
010 |
CLA |
011 |
ADD 016 |
012 |
BUN 014 |
013 |
HLT |
014 |
AND 017 |
015 |
BUN 013 |
016 |
C1A5 |
017 |
93C6 |
b. What do you understand by subroutine call? What steps are carried out when a subroutine call is encountered? State the differences between subroutine call and interrupts. (8)
Q.6 a. Simplify the Boolean function F together with the don’t-care conditions d in (1) sum-of-products form and (2) product-of-sums form.
Draw the logic diagrams also. (8)
b. With neat diagram, explain the Strobe control data transfer method. State its disadvantages (8)
Q.7 a. What is the advantages of using Virtual memory concept? How it is implemented in a Computer System? (8)
b. A Virtual memory system has 6K words of address space and 3K words of memory space. Page references are made by CPU in following sequence:
3 , 2 , 0 , 3 , 4 , 1 , 2 , 2 , 0.
Find out the pages that are available at the end if the replacement algorithm used is (a) LRU (b) FIFO.
Assume the page and block size of 1K words. (8)
Q.8 a. What is the need of I/O interface? (3)
b. Represent the following decimal numbers in BCD, Ex-3, and Gray code.
(i) 56 (ii) 93 (6)
c. State the advantages of assembly language over machine language (3)
d. State the advantages of memory mapped I/O over I/O mapped I/O. (4)
Q.9 Write short notes on any TWO:-
(i) Instruction pipeline.
(ii) DMA based data transfer.
(iii) Shift operation of data in a register. (16)