DECEMBER 2006

Code: D-10                                                                     Subject: COMPUTER ENGINEERING

Time: 3 Hours                                                                                                     Max. Marks: 100

NOTE: There are 9 Questions in all.

· Question 1 is compulsory and carries 20 marks. Answer to Q. 1. must be written in the space provided for it in the answer book supplied and nowhere else.

· Out of the remaining EIGHT Questions answer any FIVE Questions. Each question carries 16 marks.

· Any required data not explicitly given, may be suitably assumed and stated.

Q.1       Choose the correct or best alternative in the following:                                         (2x10)

a. How many address lines are needed to address each memory location in a 10244-memory chip?

(A)  10                                                (B)  11

(C)   8                                                 (D)  12

b. The highest priority interrupt in Intel 8085 microprocessor is

(A) INTR                                            (B)  TRAP

(C) RST 5.5                                        (D)  RST 6.5

c. The only language understood by a digital computer is

(A) Assembly language                       (B)  C/C++

(C)  Binary language                            (D)  High Level Language

             d.   The addressing mode of 8086 instruction MOV AX, BX

(A)  Immediate                                   (B)  Direct

(C)  Register                                       (D)  Implied          

             e.   Branch instruction are used to

(A) Manipulate numeric data.              (B)  manipulate logical data.

                   (C)  Transfer control.                           (D)  Manage data.

             f.    The addressing mode of the 8085 instruction STA 2132 is

(A) Immediate                                    (B)  Direct.

                   (C)  Register.                                       (D)  Indirect.

             g.   Flash memory is a special type of

(A) SRAM                                         (B) DRAM

(C) EPROM                                       (D) EEROM

             h.   POST in a computer is related to

(A) Postal service                               (B)  Power on self test

                   (C) E-mail                                           (D)  Internet

             i.    When the USART 8251 has to transmit data, then

(A)  DTR is low.                                  (B) DTR is high.

(C) RTS is low.                                   (D) RTS is high.

             j.    The time required to move the read/write head to the addressed sector is called

(A) Access time.                                  (B) Latency time.

(C) Seek time.                                     (D) Transfer time.

Answer any FIVE Questions out of EIGHT Questions.

Each question carries 16 marks.

Q.2     a.   Distinguish between:                                                                                              

(i) Control flow and data flow computers.

(ii) Smart terminal and intelligent terminal.                                                            (6)

             b.   What is memory-addressing capability of a CPU? Show that 2ⁿ memory locations can be addressed with n lines.                                                    (4)

c.  What is parallel processing? Discuss with the help of block diagrams the

     various ways of classifying the computers.                                                            (6)

Q.3     a.   Explain Register addressing, indirect addressing, direct addressing and immediate addressing modes of 8085 with the help of suitable examples.        (8)

             b.   Differentiate between:

(i) Fetch cycle and Execute cycle.

(ii) 80386 SX and 80386 DX.

(iii) Floppy disk and hard disk.

(iv) RISC and CISC processor.                                                       (8)

Q.4     a.   Draw and discuss in detail the internal architecture of 8086.                                (8)

b.   What are interrupts? How is enabling, disabling and masking of interrupts carried out in 8085?                                                                   (8)

Q.5     a.   What is a virtual memory? What are its advantages?                                           (6)

     b.   DRAMS are slower than SRAMS; still they are used as main memory in personal computers. Give reasons.                                                                                                                         (4)

c.   Explain briefly the following terms with respect to hard disk: FAT, System area, Root directory.                                                                 (6)

  Q.6     a. Explain the Interrupt driven data transfer scheme. How is it different from programmed I/O data transfer scheme?                                              (8)

             b.   What is the difference between serial data transfer and parallel data transfer. Discuss the following with respect to serial data transfer.

(i) RS 232

(ii) Baud rate

(iii) Start and stop bits                                                                      (8)

Q.7     a.   Explain the role of computers in Industrial control and Instrumentation.                (2)

b.   Differentiate between Pentium, Pentium Pro, Pentium 1 and Pentium 2.               (4)

c.   Explain the working of a graphic tablet.                                                              (4)

             d.   What is a programmable interval timer/counter? Discuss the various operating modes of a timer/counter.                                                                (6)

Q.8     a.   What is an assembler? Give the differences between an assembler and a compiler.              (4)

             b.   Write a short note on salient features of 8255, the programmable peripheral interface.                     (6)

c.   What is ROM-BIOS? Name some of the services provided by ROM-BIOS.     (2)

             d.  What is stack? Discuss the role of stack while using subroutines. Also explain the meaning of the term ‘FIFO’ with respect to stacks.                         (4)

Q.9     a.   What do you understand by the term chipset? Explain how DRAM controller (82359) and Bus master interface controller (82355) are interfaced to 82350 EISA chipset.                                     (3)

             b.  What is a bus? Explain PCI bus or EISA bus in brief.                                          (4)

             c.   Explain the following terms:-

(i) Plotters

(ii) CD-ROM

(iii) RASTER Scan

(iv) Novell NETWARE

(v) Multiprogramming                                                                                 (5)

d. What are optical scanners? Discuss the different types of commonly used optical scanners. (4)